Abstract: An apparatus and method for encoding multi-channel video signals using a single encoder by a space division technique or a time division technique. In the multi-channel video encoding apparatus, a signal extraction unit extracts synchronous signals and active video data from received video signals. A decimation filter unit spatially decimates the extracted active video data according to the number of channels. A synchronization, unit synchronizes the decimated active video data for channels. An encoding unit encodes the synchronized decimated active video data received from the synchronization unit. This multi-channel video encoding apparatus can independently encode multi-channel video signals at the same time using a single encoder.

Abstract: A data transmission circuit includes a cyclic check (CRC) circuit which improves operation speed of the overall system by checking errors for safe data transmission and a data rate control circuit of which the rate control portion required for data interface includes two simple counter logics to control the data rate during data interface.

Abstract: A zig-zag and alternate scan conversion circuit for encoding/decoding videos which is structured only by logic circuits using a regularity of scan address patterns, thereby achieving an improvement in processing speed and a reduction in area.

Abstract: An inverse quantizing device includes memories which are addressed by input quantized coefficients and quantization levels and store resultant data of inverse quantization in groups such as intra DC, intra AC and non-intra. A control section discriminates the group of an input data to be inverse-quantized according to input block-type and block-strobe signals, selects one of the memories according to the discriminated result, and controls the selected memory to output the resultant data of inverse quantization stored therein. According to the device, real time processing of the input data is achieved with its simplified construction.