Patents by Inventor Si Jun NIAN

Si Jun NIAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Wafer cassette and placement method thereof
    Patent number: 10147626
    Abstract: A wafer cassette and a method for placing a wafer are provided. The wafer cassette includes a box body including a plurality of groups of card slots formed on sidewalls of the box body. Each group of the card slots is configured to hold a wafer and includes a wafer input terminal. The wafer cassette also includes a guide device including a plurality of groups of guide slots configured to be docked to the wafer input terminals. Each group of the guide slots and a docking group of the card slots are formed at a same floor.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: December 4, 2018
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Si Jun Nian, Tzu Chieh Chien, Xiao Jin Li, Pan Lin Dong
  • WAFER CASSETTE AND PLACEMENT METHOD THEREOF
    Publication number: 20170301570
    Abstract: A wafer cassette and a method for placing a wafer are provided. The wafer cassette includes a box body including a plurality of groups of card slots formed on sidewalls of the box body. Each group of the card slots is configured to hold a wafer and includes a wafer input terminal. The wafer cassette also includes a guide device including a plurality of groups of guide slots configured to be docked to the wafer input terminals. Each group of the guide slots and a docking group of the card slots are formed at a same floor.
    Type: Application
    Filed: April 3, 2017
    Publication date: October 19, 2017
    Inventors: Si Jun NIAN, Tzu Chieh CHIEN, Xiao Jin LI, Pan Lin DONG