Patents by Inventor Siping Zhao

Siping Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for performing a shelf lifetime acceleration test
    Patent number: 8061224
    Abstract: Embodiments of the invention provide a method of determining a storage lifetime of a wafer in a storage environment, the storage environment corresponding to an environment having a first value of temperature and a first value of relative humidity, the wafer having a pre-test value of a first contamination parameter, including the steps of: subjecting the wafer to a test environment for a test period, the test environment includes an environment having a second value of temperature and a second value of relative humidity; subsequently, inspecting the wafer thereby to determine a post-test value of a second contamination parameter, wherein the second value of relative humidity is greater than 30% and the second value of wafer temperature is greater than 30° C.
    Type: Grant
    Filed: May 6, 2008
    Date of Patent: November 22, 2011
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Siping Zhao, Younan Hua, Ramesh Rao Nistala, Kun Li
  • METHOD FOR PERFORMING A SHELF LIFETIME ACCELERATION TEST
    Publication number: 20090277287
    Abstract: Embodiments of the invention provide a method of determining a storage lifetime of a wafer in a storage environment, the storage environment corresponding to an environment having a first value of temperature and a first value of relative humidity, the wafer having a pre-test value of a first contamination parameter, including the steps of: subjecting the wafer to a test environment for a test period, the test environment includes an environment having a second value of temperature and a second value of relative humidity; subsequently, inspecting the wafer thereby to determine a post-test value of a second contamination parameter, wherein the second value of relative humidity is greater than 30% and the second value of wafer temperature is greater than 30° C.
    Type: Application
    Filed: May 6, 2008
    Publication date: November 12, 2009
    Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
    Inventors: Siping ZHAO, Younan HUA, Ramesh Rao NISTALA, Kun LI