Abstract: A preamplifier may include: a common active load suitable for providing output impedance; an output polarity changing unit suitable for changing an output polarity of output nodes; a multi-differential input stage suitable for receiving an input voltage, a coarse ramping voltage, a fine ramping voltage and a common mode voltage, and sampling the common mode voltage and the coarse ramping voltage for amplification operations; and a coupling blocking unit suitable for blocking a coupling between the output nodes and input nodes that are included in the multi-differential input stage.

Abstract: A preamplifier may include: a common active load suitable for providing output impedance; an output polarity changing unit suitable for changing an output polarity of output nodes; a multi-differential input stage suitable for receiving an input voltage, a coarse ramping voltage, a fine ramping voltage and a common mode voltage, and sampling the common mode voltage and the coarse ramping voltage for amplification operations; and a coupling blocking unit suitable for blocking a coupling between the output nodes and input nodes that are included in the multi-differential input stage.

Abstract: A comparing device includes a first stage comparator and a second stage comparator serially coupled to the first stage comparator, wherein output lines of the second stage comparator are disposed to be overlapped with respective input lines of the second stage comparator.

Abstract: A ramp signal generator includes a reset control block suitable for generating a switch control signal according to a reset control signal from a control unit; a ramp signal generation block suitable for generating differential ramp signals, which include a power noise or a ground noise as well as a ramp noise; and a common noise canceling unit suitable for being initialized according to the switch control signal, and suitable for canceling common noise through a differential operation between the differential ramp signals.

Abstract: A differential amplifier includes an input common mode voltage generation unit suitable for generating an input common mode voltage, an input common mode voltage sampling unit suitable for performing an independent sampling operation on the input common mode voltage, and a differential amplifying unit suitable for performing a differential amplifying operation on an input voltage and the sampled input common mode voltage.

Abstract: A replica noise generator includes a control logic unit suitable for outputting a capacitance adjusting signal; a replica noise generation unit suitable for generating a replica noise through a coupling of a power voltage used in a pixel array by adjusting a capacitance value in response to the capacitance adjusting signal; and a source follower suitable for inputting the generated replica noise.

Abstract: A comparing device includes a first stage comparator and a second stage comparator serially coupled to the first stage comparator, wherein output lines of the second stage comparator are disposed to be overlapped with respective input lines of the second stage comparator.

Abstract: A ramp signal generator includes a reset control block suitable for generating a switch control signal according to a reset control signal from a control unit; a ramp signal generation block suitable for generating differential ramp signals, which include a power noise or a ground noise as well as a ramp noise; and a common noise canceling unit suitable for being initialized according to the switch control signal, and suitable for canceling common noise through a differential operation between the differential ramp signals.

Abstract: A replica noise generator includes a control logic unit suitable for outputting a capacitance adjusting signal; a replica noise generation unit suitable for generating a replica noise through a coupling of a power voltage used in a pixel array by adjusting a capacitance value in response to the capacitance adjusting signal; and a source follower suitable for inputting the generated replica noise.

Abstract: A ramp signal generator may include a ramp signal generation unit suitable for generating a ramp signal and a gain amplification control signal, an overlap voltage generation unit suitable for generating an overlap voltage to be overlapped with the ramp signal, and a voltage overlapping unit suitable for controlling a voltage gain by amplifying the ramp signal according to the gain amplification control signal, and overlapping the overlap voltage with the ramp signal.

Abstract: An image sensing device includes a plurality of pixels arranged in rows and columns and a sampling unit suitable for sampling the plurality of pixels in units of M by N in a binning mode, M and N being a positive integer greater than 2.

Abstract: According to an embodiment of the inventive concept disclosed in this application, a ramp signal generator may include a ramp signal generation unit suitable for generating a ramp signal, a gain amplification control unit suitable for outputting a gain amplification control signal for controlling a voltage gain in response to a control signal from a control unit; and a programmable gain amplifier (PGA) suitable for controlling the voltage gain by amplifying the ramp signal provided from the ramp signal generation unit in response to the gain amplification control signal from the gain amplification control unit.

Abstract: An image sensing device includes a first read unit suitable for generating a first read signal by reading a first pixel signal, a first input line suitable for transmitting the first pixel signal, a first feedback line suitable for feeding back the first read signal, a second read unit disposed adjacent to the first read unit in a same row and suitable for generating a second read signal by reading a second pixel signal, a second input line suitable for transmitting the second pixel signal, and a second feedback line suitable for feeding back the second read signal wherein the first input line and the first feedback line are disposed symmetrically to the second input line and the second feedback line.

Abstract: A differential amplifier includes an input common mode voltage generation unit suitable for generating an input common mode voltage, an input common mode voltage sampling unit suitable for performing an independent sampling operation on the input common mode voltage, and a differential amplifying unit suitable for performing a differential amplifying operation on an input voltage and the sampled input common mode voltage.

Abstract: An amplifier includes a common load suitable for outputting an output signal, a coarse input differential stage, coupled to the common load, suitable for amplifying a difference between an input signal and a coarse ramping signal to output a coarse conversion signal as a first output signal, when the coarse ramping signal is lower than the input signal, and a fine input differential stage, coupled to the common load, suitable for amplifying a difference between a fine ramping signal and a bias signal and compensating the first output signal to output a fine conversion signal as the output signal, when a zero crossing occurs by the compensated first output signal.

Abstract: An amplifier includes a common load suitable for outputting an output signal, a coarse input differential stage, coupled to the common load, suitable for amplifying a difference between an input signal and a coarse ramping signal to output a coarse conversion signal as a first output signal, when the coarse ramping signal is lower than the input signal, and a fine input differential stage, coupled to the common load, suitable for amplifying a difference between a fine ramping signal and a bias signal and compensating the first output signal to output a fine conversion signal as the output signal, when a zero crossing occurs by the compensated first output signal.

Abstract: An image sensing device includes a plurality of pixels arranged in rows and columns and a sampling unit suitable for sampling the plurality of pixels in units of M by N in a binning mode, M and N being a positive integer greater than 2.

Abstract: A counting device includes a control unit sutable for generating a control signal including a first control signal and a second control signal, a first operation unit suitable for performing a logic operation for pixel signals of a pixel array and a control signal, wherein pixel signals of used column in the pixel array are transferred by using the first control signal, and pixel signals of unused column in the pixel array are blocked by using the second control signal during a binning mode operation, a second operation unit suitable for performing a logic operation for a counter clock and an output signal of the first operation unit, and a counting unit suitable for counting an output signal of the second operation unit.

Abstract: A column circuit for an image sensor includes a first column read circuit configured to read data of a first column line, and a second column read circuit configured to read data of a second column line, wherein, during a binning mode, data from two or more pixels are outputted through the first column line and stored in the first column read circuit in a first phase, data from two or more pixels are outputted through the second column line and stored in the second column read circuit in a second phase, and charges are shared between the first column read circuit and the second column read circuit in a third phase.

Abstract: A column circuit for an image sensor includes a first column read circuit configured to read data of a first column line, and a second column read circuit configured to read data of a second column line, wherein, during a binning mode, data from two or more pixels are outputted through the first column line and stored in the first column read circuit in a first phase, data from two or more pixels are outputted through the second column line and stored in the second column read circuit in a second phase, and charges are shared between the first column read circuit and the second column read circuit in a third phase.