Abstract: A flash memory system segregates overhead data from user data so that overhead data may be addressed, programmed and erased independently from user data. The non-volatile memory medium of a flash memory system is mapped into a plurality of separate and separately addressable memory blocks that are independently programmable and independently erasable, including Dedicated Overhead Blocks and Dedicated Data Blocks. The Dedicated Overhead Blocks are mapped according to a plurality of distinguishably addressable segments. User Data defined by a VLBA is stored in a Dedicated Data Block within the flash memory. Successively generated sets of Overhead Data are stored in respective segments in the Dedicated Overhead Blocks. When a Dedicated Overhead Block is designated for erasure, any current overhead segments are consolidated and moved to a new Dedicated Overhead Block., and the full or obsolete block is erased.

Abstract: A switch is coupled between a plurality of host units and a device for routing frame information therebetween. The switch includes a first serial advanced technology attachment (ATA) port including a first host task file that is responsive to a non-data frame information structure (FIS) from a first host unit. The switch further includes a second serial ATA port including a second host task file that is responsive to a non-data FIS from a second host unit. The switch further includes a third serial ATA port that is responsive to a non-data FIS from a device and further includes an arbitration and control circuit for selecting one of the first host or second host units to concurrently access the device, through the switch, by accepting non-data FIS, from either of the first or second host units, at any given time, including when the device is not in an idle state.

Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

Abstract: A switch is coupled between a plurality of host units and a device for communicating therebetween. Included is a first serial advanced technology attachment (SATA) port, a second SATA port, and a third SATA port. The first SATA port includes a first host task file coupled to a first host unit, and the first host task file is responsive to commands sent by the first host unit to the device. The second SATA port includes a second host task file coupled to a second host unit, and the second host task file is responsive to commands sent by the second host unit to the device. An arbitration control circuit is coupled to the SATA ports, and selects from the first and second hosts to concurrently access the device, through the switch, accepting commands from either host units at any time, including when the device is not idle.

Abstract: Various embodiments include methods, apparatus, and systems to scan at least a portion of a memory device when a condition for scanning is met. The condition may be dependent on one or more of a number of read operations, a number of write operations, time, and others. Other embodiments including additional methods, apparatus, and systems are disclosed.

Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

Abstract: In accordance with an embodiment of the present invention, an electronic device is displayed for purchase by a user and includes a controller and a protected area for storing a key and a bar code associated with and for identifying the device including a password unique to the device, wherein upon purchase of the device, the password is compared to the key and upon successful activation thereof, the device is activated, otherwise, the device is rendered inoperable.

Abstract: A flash memory system segregates overhead data from user data so that overhead data may be address, programmed and erased independently from user data. The non-volatile memory medium of a flash memory system is mapped into a plurality of separate and separately addressable memory blocks that are independently programmable and independently erasable, including Dedicated Overhead Blocks and Dedicated Data Blocks. The Dedicated Overhead Blocks are mapped according to a plurality of distinguishably addressable segments. User Data defined by a VLBA is stored in a Dedicated Data Block within the flash memory. Successively generated sets of Overhead Data, such as a cross reference to the physical address of the user data, flags, and Error Correction Data generated in conjunction with incoming User Data, are stored in respective segments in the Dedicated Overhead Blocks.

Abstract: A flash memory system segregates overhead data from user data so that overhead data may be addressed, programmed and erased independently from user data. The non-volatile memory medium of a flash memory system is mapped into a plurality of separately addressable memory blocks that are independently programmable and independently erasable, including a plurality of Dedicated Overhead Blocks and Dedicated Data Blocks. The Dedicated Overhead Blocks are mapped according to a plurality of distinguishably addressable segments, and include a first Dedicated Overhead Block and a second Dedicated Overhead Block. User Data defined by a VLBA is stored in a Dedicated Data Block within the flash memory.

Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

Abstract: An embodiment of the present invention is disclosed to include a three stage scalable switching network that can be built from a common module. Further disclosed are methods for building switching network v(k, n, m) from a common module comprising a (n×k) input switch, a (k?×k?) middle switch, and a (k×n) output switch.

Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

Abstract: In accordance with an embodiment of the present invention, an electronic device is displayed for purchase by a user and includes a controller and a protected area for storing a key and a bar code associated with and for identifying the device including a password unique to the device, wherein upon purchase of the device, the password is compared to the key and upon successful activation thereof, the device is activated, otherwise, the device is rendered inoperable.

Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

Abstract: An embodiment of the present invention is disclosed to include a nonvolatile memory system for controlling erase operations performed on a nonvolatile memory array comprised of rows and columns, the nonvolatile memory array stores digital information organized into blocks with each block having one or more sectors of information and each sector having a user data field and an extension field and each sector stored within a row of the memory array. A controller circuit is coupled to a host circuit and is operative to perform erase operations on the nonvolatile memory array, the controller circuit erases an identified sector of information having a particular user data field and a particular extension field wherein the particular user field and the particular extension field are caused to be erased separately.

Abstract: Defect management for automatic track processing without an ID field, processes defect information for a track on a magnetic media within a disk drive system. A system which uses any method of defect management including linear replacement, sector slipping, cylinder slipping or segment slipping, can be supported. A physical sector number for each sector is translated to a logical sector number relating to the order of data on a track. This translation of the physical sector number to a logical sector number for automatic track processing can be accomplished using any one of three methods: 1) a track defect table can be built in the buffer RAM; 2) the defect information can be written in the header of every sector; or 3) a system FIFO, located in the onboard logic, can be used to manage the defect list. In the second method, the header subfield comprises four defect records.

Abstract: An embodiment of the present invention is disclosed to include a nonvolatile memory system for controlling erase operations performed on a nonvolatile memory array comprised of rows and columns, the nonvolatile memory array stores digital information organized into blocks with each block having one or more sectors of information and each sector having a user data field and an extension field and each sector stored within a row of the memory array. A controller circuit is coupled to a host circuit and is operative to perform erase operations on the nonvolatile memory array, the controller circuit erases an identified sector of information having a particular user data field and a particular extension field wherein the particular user field and the particular extension field are caused to be erased separately.

Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

Abstract: An integrated HDD system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g. digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. The invention takes advantage of existing circuit design modules provided in the integrated circuit as “hard block” components which are unchanged by integrated circuit design software. Changes in operability of the overall integrated circuit may be readily achieved by altering “soft block” components to customize or tailor the design for a particular hard drive.