Patents by Inventor Sian She
Sian She has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230299933Abstract: An apparatus includes an analog to digital converter configured to receive one or more first frames of a first component carrier signal having a first uplink-downlink subframe pattern, and receive one or more additional frames of at least one additional component carrier signal, the one more or more additional frames including one or more second frames of a second component carrier signal, the at least one additional component carrier signal including the second component carrier signal. The apparatus may further include control logic configured to activate timing skew calibration of at least one of the first or second component carrier signals based, at least in part, on an operating mode of the second component carrier signal and respective symbols of the first component carrier signal and second component carrier signal.Type: ApplicationFiled: March 17, 2022Publication date: September 21, 2023Inventors: Jun Fang, John Szeming Wang, Sian She
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Patent number: 7768730Abstract: A read channel in that reads data from a magnetic storage media. An analog signal produced by passing a read head over magnetic storage media is amplified to match the range of an analog to digital converter (ADC) range. A baseline adjustment is performed on the amplified analog signal to center the amplified analog signal to a midscale of the ADC, which may be based on an error feedback signal and/or a decision feedback signal. Read channel compensation may then be performed after the baseline adjustment has been applied. The read channel compensated analog signal is sampled with the ADC to produce a digital signal. This digital signal may be filtered and a bit sequence may then be detected from the filtered digital signal. The EFB signal and/or the DFB signal may be produced in the digital domain based on the digital signal and the detected bit sequences.Type: GrantFiled: February 15, 2008Date of Patent: August 3, 2010Assignee: Broadcom CorporationInventors: William Gene Bliss, Sian She
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Publication number: 20080266693Abstract: A read channel in that reads data from a magnetic storage media. An analog signal produced by passing a read head over magnetic storage media is amplified to match the range of an analog to digital converter (ADC) range. A baseline adjustment is performed on the amplified analog signal to center the amplified analog signal to a midscale of the ADC, which may be based on an error feedback signal and/or a decision feedback signal. Read channel compensation may then be performed after the baseline adjustment has been applied. The read channel compensated analog signal is sampled with the ADC to produce a digital signal. This digital signal may be filtered and a bit sequence may then be detected from the filtered digital signal. The EFB signal and/or the DFB signal may be produced in the digital domain based on the digital signal and the detected bit sequences.Type: ApplicationFiled: February 15, 2008Publication date: October 30, 2008Applicant: BROADCOM CORPORATIONInventors: William Gene Bliss, Sian She
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Patent number: 6680807Abstract: A disk drive system is disclosed that includes a disk device coupled to control circuitry. The control circuitry includes a read channel with a detector that detects servo mark sub-patterns and correlates the detected servo mark sub-patterns to detect a servo mark. The detector includes matched filters to detect the sub-patterns.Type: GrantFiled: March 8, 2000Date of Patent: January 20, 2004Assignee: Cirrus Logic, Inc.Inventors: Sian She, David E. Reed
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Patent number: 6614609Abstract: A disk drive system is disclosed that includes a disk device coupled to control circuitry. The control circuitry includes a read channel with a detector that detects a bit sequence associated with Gray codes and delays indications of the bit sequence detection to handle phase shifts. The detector generates a Gray code detection signal in response to the delayed indications. The control circuitry processes the Gray code in response to the Gray code detection signal.Type: GrantFiled: March 8, 2000Date of Patent: September 2, 2003Assignee: Cirrus Logic, Inc.Inventors: David E. Reed, Sian She
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Patent number: 6507546Abstract: A sampled amplitude read channel is disclosed for reading data recorded on a disk storage medium by detecting an estimated data sequence from a sequence of read signal sample values generated by an analog read signal emanating from a read head positioned over the disk storage medium. A sampling device samples the analog read signal to generate the read signal sample values, and a discrete-time equalizer equalizes the read signal sample values according to an asymmetric partial response target comprising a dipulse response of the form: (. . . , 0, 0,+X0,+X1,−X2,−X3,−X4, 0, 0, . . . ) where X0−X4 are non-zero to thereby generate equalized sample values. In the embodiments disclosed herein, X0−X4 are 2,2,1,2,1 respectively. A discrete-time sequence detector detects the estimated data sequence from the equalized sample values.Type: GrantFiled: November 12, 1999Date of Patent: January 14, 2003Assignee: Cirrus Logic, IncorporatedInventors: William G. Bliss, Sian She, Lisa C. Sundell
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Patent number: 6216249Abstract: A sampled amplitude read channel for use in disk storage systems (magnetic or optical) is disclosed comprising a simplified branch metric calculator for use in a trellis sequence detector. Instead of computing the traditional Euclidean branch metric as the squared difference between the actual signal sample and the expected signal sample of the target partial response, the present invention computes a simplified branch metric which is then saturated in order to reduce the number of bits required to calculate and store the branch metrics, thereby simplifying the branch metric calculators as well as reducing the add-compare-select (ACS) circuitry for each state in the trellis. Furthermore, the saturation technique of the present invention is substantially data independent meaning that the saturation threshold is essentially independent from the signal samples used to compute the branch metric.Type: GrantFiled: March 3, 1999Date of Patent: April 10, 2001Assignee: Cirrus Logic, Inc.Inventors: William G. Bliss, Sian She
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Patent number: 6111710Abstract: A sampled amplitude read channel is disclosed for reading data recorded on a disk storage medium by asynchronously sampling an analog read signal, equalizing the asynchronous sample values according to a desired partial response, and interpolating the equalized sample values to generate synchronous sample values substantially synchronized to a baud rate of the recorded data. The read channel further comprises a gain control circuit which generates a gain error for adjusting the amplitude of the analog read signal to a nominal value through a variable gain amplifier (VGA). During acquisition, the gain error is computed from the asynchronous sample values at the output of the sampling device in order to avoid the delay associated with the discrete equalizer filter and the timing recovery interpolation filter. This decreases the acquisition time and the corresponding length of the acquisition preamble, thereby reserving more area on the disk to record user data.Type: GrantFiled: June 25, 1997Date of Patent: August 29, 2000Assignee: Cirrus Logic, Inc.Inventors: German S. Feyh, Sian She, William G. Bliss
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Patent number: 5966415Abstract: A sampled amplitude read channel for disk storage systems is disclosed which asynchronously sub-samples an analog read signal significantly below the Nyquist rate (the baud rate) in order to increase the effective data rate without increasing the frequency of the sampling device. Interpolated timing recovery up-samples the asynchronous samples to generate sample values synchronized to the baud rate, and a Viterbi sequence detector detects the recorded digital data from the synchronous sample values. To compensate for the time-varying characteristics of the recording device, a discrete-time equalizer adaptively equalizes the asynchronous sample values using a least mean square (LMS) adaptive algorithm,W.sub.k+1 =W.sub.k -.mu..multidot.e.sub.k .multidot.X.sub.k,where W.sub.k is a vector of FIR filter coefficients, .mu. is a programmable gain, e.sub.k is a sample error between the FIR filter's actual output and a desired output, and X.sub.k is a vector of samples values from the FIR filter input.Type: GrantFiled: June 13, 1997Date of Patent: October 12, 1999Assignee: Cirrus Logic, Inc.Inventors: William G. Bliss, Sian She, David E. Reed