Patents by Inventor Siddartha Kumar Panda

Siddartha Kumar Panda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9965397
    Abstract: An apparatus having a cache and a circuit is disclosed. The cache includes a plurality of cache lines. The cache is configured to (i) store a plurality of data items in the cache lines and (ii) generate a map that indicates a dirty state or a clean state of each of the cache lines. The cache also has a write-back policy to a memory. The circuit is configured to (i) check a location in the map corresponding to a read address of a read request and (ii) obtain read data directly from the memory by bypassing the cache in response to the location having the clean state.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 8, 2018
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Horia Simionescu, Siddartha Kumar Panda, Kunal Sablok, Veera Kumar Reddy Oleti
  • Publication number: 20140244902
    Abstract: An apparatus having a cache and a circuit is disclosed. The cache includes a plurality of cache lines. The cache is configured to (i) store a plurality of data items in the cache lines and (ii) generate a map that indicates a dirty state or a clean state of each of the cache lines. The cache also has a write-back policy to a memory. The circuit is configured to (i) check a location in the map corresponding to a read address of a read request and (ii) obtain read data directly from the memory by bypassing the cache in response to the location having the clean state.
    Type: Application
    Filed: March 15, 2013
    Publication date: August 28, 2014
    Applicant: LSI CORPORATION
    Inventors: Horia Simionescu, Siddartha Kumar Panda, Kunal Sablok, Veera Kumar Reddy Oleti