Abstract: A method, apparatus, and system to control and test a solar inverter are provided. The method commissions a solar inverter of a solar plant before it is placed into power production. The commissioning process verifies that the inverter to be tested is functioning as intended by connecting a first inverter to the inverter to be commissioned, and using the first inverter to emulate the power grid without being connected to the power grid, and circulate reactive and limited active power between the first inverter and the inverter to be commissioned.

Abstract: Provided is a fault isolation apparatus for an inverter configured for coupling to an external power supply. The apparatus includes a plurality of fault detection devices, each configured to (i) complete an electrical path between the inverter and the external power supply and (ii) detect a fault along its respective electrical path. The apparatus also includes a controller configured to instruct the fault detection device to complete its respective electrical path only when the path is devoid of the detected fault.

Abstract: A method, apparatus, and system to control and test a solar inverter are provided. The method commissions a solar inverter of a solar plant before it is placed into power production. The commissioning process verifies that the inverter to be tested is functioning as intended by connecting a first inverter to the inverter to be commissioned, and using the first inverter to emulate the power grid without being connected to the power grid, and circulate reactive and limited active power between the first inverter and the inverter to be commissioned.

Abstract: Provided is a method for controlling operation of semiconductor gates in a power conversion system including one or more multilevel inverters coupleable to a modulator and a controller. The method includes generating, via the controller, a control signal responsive to an output current power factor associated with the inverters and producing a discontinuous pulse width modulation reference signal based upon the control signal and a target output power, the discontinuous pulse width modulation reference signal being indicative of shifting a phase angle between current and voltage. A gating signal is generated for output from the modulator, as a function of the reference signal and a carrier waveform. The gating signal adjusts the phase angle to prevent switching of the semiconductor gates.

Abstract: Provided is a fault isolation apparatus for an inverter configured for coupling to an external power supply. The apparatus includes a plurality of fault detection devices, each configured to (i) complete an electrical path between the inverter and the external power supply and (ii) detect a fault along its respective electrical path. The apparatus also includes a controller configured to instruct the fault detection device to complete its respective electrical path only when the path is devoid of the detected fault.

Abstract: Provided is a method for controlling operation of semiconductor gates in a power conversion system including one or more multilevel inverters coupleable to a modulator and a controller. The method includes generating, via the controller, a control signal responsive to an output current power factor associated with the inverters and producing a discontinuous pulse width modulation reference signal based upon the control signal and a target output power, the discontinuous pulse width modulation reference signal being indicative of shifting a phase angle between current and voltage. A gating signal is generated for output from the modulator, as a function of the reference signal and a carrier waveform. The gating signal adjusts the phase angle to prevent switching of the semiconductor gates.

Abstract: A system including a multi-level power converter is provided. The system also includes a plurality of DC link capacitors and a balancing circuit coupled to the multi-level power converter. The balancing circuit further includes two sets of interface branches. Each set includes a plurality of interface branches and a plurality of switching elements. The balancing circuit also includes a battery coupled to one or more inductors across the two sets of interface branches and a controller for controlling switching operations of the plurality of switching elements for modifying a voltage of the battery to balance voltages of the plurality of DC link capacitors.