Abstract: A test method for debugging failures of an IC device with use of an event based semiconductor test system is capable of distinguishing a timing related failure from other failures. The test method includes the steps of: applying a test signal to a DUT and evaluating a response output of the DUT, detecting a failure in the response output, identifying a reference clock signal related to the failure, identifying a portion of the reference clock signal that is directly related to the failure, and incrementally changing a timing of events for the identified portion of the reference clock signal to detect change in the response output from the DUT.

Abstract: A test method for debugging failures of an IC device with use of an event based semiconductor test system is capable of distinguishing a timing related failure from other failures. The test method includes the steps of: applying a test signal to a DUT and evaluating a response output of the DUT, detecting a failure in the response output, identifying a reference signal related to the failure, identifying a portion of the reference signal, and incrementally changing a timing of events in the portion of the reference signal to detect change in the response output from the DUT.