Abstract: Introduced here is a resource management platform (also called a “resource manager”) that is able to dynamically allocate compute resources to workloads to accommodate resource requirements of a tenant in a more efficient and cost-effective manner, especially in scenarios where compute resource availability is elastic in nature. The resource manager can include a scheduling engine and a recommending engine that together are able to optimize the scaling up and down of compute resources in different scenarios. Normally, the resource manager can communicate with a resource-aware, external entity that may be responsible for implementing appropriate changes on a cloud infrastructure. For example, the external entity may be responsible for adding or removing nodes assigned to a given tenant, as well as obtaining relevant attributes of those compute resources from a provider of the cloud infrastructure.

Abstract: A wireless power transmitting device transmits wireless power signals to a wireless power receiving device. To detect foreign objects, the wireless power transmitting device has an array of temperature sensors. The array of temperature sensors may include temperature sensor components such as temperature sensitive thin-film resistors or other temperature sensitive components. A temperature sensor may have thin-film resistors formed on opposing sides of a substrate. The thin-film resistors may be formed from meandered metal traces to reduce eddy current formation during operation of the wireless power transmitting device. Signal paths coupling control circuitry on the wireless power transmitting device to the array of temperature sensors may be configured to extend along columns of the temperature sensors without running along each row of the temperature sensors, thereby reducing eddy currents from loops of signal routing lines.

Abstract: A wireless power transmitting device transmits wireless power signals to a wireless power receiving device. To detect foreign objects, the wireless power transmitting device has an array of temperature sensors. The array of temperature sensors may include temperature sensor components such as temperature sensitive thin-film resistors or other temperature sensitive components. A temperature sensor may have thin-film resistors formed on opposing sides of a substrate. The thin-film resistors may be formed from meandered metal traces to reduce eddy current formation during operation of the wireless power transmitting device. Signal paths coupling control circuitry on the wireless power transmitting device to the array of temperature sensors may be configured to extend along columns of the temperature sensors without running along each row of the temperature sensors, thereby reducing eddy currents from loops of signal routing lines.

Abstract: A wireless power transmitting device transmits wireless power signals to a wireless power receiving device. The wireless power receiving device has a rectifier and a wireless power receiving coil that receives wireless power signals. The wireless power transmitting device uses a layer of coils to transmit the wireless power signals. A dielectric layer in the wireless power transmitting device defines a charging surface that receives the wireless power receiving device. A layer of temperature sensors is interposed between the layer of coils and the dielectric layer. Control circuitry in the wireless power transmitting device uses temperature information from the temperature sensors to determine whether a foreign object such as a coin is present on the charging surface.

Abstract: A wireless power transmitting device transmits wireless power signals to a wireless power receiving device. The wireless power receiving device has a rectifier and a wireless power receiving coil that receives wireless power signals. The wireless power transmitting device uses a layer of coils to transmit the wireless power signals. A dielectric layer in the wireless power transmitting device defines a charging surface that receives the wireless power receiving device. A layer of temperature sensors is interposed between the layer of coils and the dielectric layer. Control circuitry in the wireless power transmitting device uses temperature information from the temperature sensors to determine whether a foreign object such as a coin is present on the charging surface.

Abstract: A wireless power transmitting device transmits wireless power signals to a wireless power receiving device. To detect foreign objects, the wireless power transmitting device has an array of temperature sensors. The array of temperature sensors may include temperature sensor components such as temperature sensitive thin-film resistors or other temperature sensitive components. A temperature sensor may have thin-film resistors formed on opposing sides of a substrate. The thin-film resistors may be formed from meandered metal traces to reduce eddy current formation during operation of the wireless power transmitting device. Signal paths coupling control circuitry on the wireless power transmitting device to the array of temperature sensors may be configured to extend along columns of the temperature sensors without running along each row of the temperature sensors, thereby reducing eddy currents from loops of signal routing lines.

Abstract: An apparatus and method are provided. The apparatus includes a multiplexer, including first, second, and third inputs, and an output; a first transistor, including a gate connected to the multiplexer, and first and second terminals; a first variable capacitor, including a first terminal connected to the first transistor, a second terminal, and an input; a first inductor, including a first terminal connected to the first transistor, and a second terminal connected to the second terminal of the first variable capacitor; a second transistor, including a gate connected to the output of the multiplexer, a first terminal, and a second terminal connected to the second terminal of the first inductor; a second inductor mutually coupled to the first inductor, including a first and second terminals; and a balun-bias switch, including first, second, and third inputs, and an output connected to the second terminal of the second inductor.

Abstract: An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.

Abstract: Apparatuses, systems, and methods for a digital power amplifier (DPA) to generate a monotonic and linear ramp-up and ramp-down for a time division multiple access (TDMA) slot transmission are described. In one aspect, a monotonic and linear amplitude-to-control input code relationship model is generated for the DPA and stored. When the DPA needs to generate a ramp-up or ramp-down, the stored monotonic and linear amplitude-to-control input code relationship model is used to shape the input control code before it is input into the DPA. A new monotonic and linear amplitude-to-control input code relationship model may be generated and stored if the operating conditions change. The apparatuses, systems, and methods described herein may be applied to a multi-standard broadband modem chip capable of 2G transmission.

Abstract: In one aspect there is provided a method. The method may include receiving a first analog radio frequency signal including a signal of interest and an interference signal caused by a second analog radio frequency signal transmitted in full duplex over a channel from which the first analog transmission is received; combining the first analog radio frequency signal and a portion of the second analog radio frequency signal to generate an output analog radio frequency signal characterized by at least a reduction or an elimination of the interference signal included in the output analog radio frequency signal; and providing the output analog radio frequency signal. Related apparatus, systems, methods, and articles are also described.

Abstract: An apparatus and method are provided. The apparatus includes a multiplexer, including first, second, and third inputs, and an output; a first transistor, including a gate connected to the first multiplexer, and first and second terminals; a first variable capacitor, including a first terminal connected to the first transistor, a second terminal, and an input; a first inductor, including a first terminal connected to the first transistor, and a second terminal connected to the second terminal of the first variable capacitor; a second transistor, including a gate connected to the output of the first multiplexer, a first terminal, and a second terminal connected to the second terminal of the first inductor; a second inductor mutually coupled to the first inductor, including a first and second terminals; and a balun-bias switch, including first, second, and third inputs, and an output connected to the second terminal of the second inductor.

Abstract: Apparatuses, systems, and methods for a digital power amplifier (DPA) to generate a monotonic and linear ramp-up and ramp-down for a time division multiple access (TDMA) slot transmission are described. In one aspect, a monotonic and linear amplitude-to-control input code relationship model is generated for the DPA and stored. When the DPA needs to generate a ramp-up or ramp-down, the stored monotonic and linear amplitude-to-control input code relationship model is used to shape the input control code before it is input into the DPA. A new monotonic and linear amplitude-to-control input code relationship model may be generated and stored if the operating conditions change. The apparatuses, systems, and methods described herein may be applied to a multi-standard broadband modem chip capable of 2G transmission.

Abstract: An apparatus and method are provided. The apparatus includes a multiplexer, including a first input, a second input, a third input, and an output; a first transistor, including a gate, a first terminal, and a second terminal; a first variable capacitor, including a first terminal, a second terminal, and an input; a first inductor, including a first terminal and a second terminal; a second transistor, including a gate, a first terminal, and a second terminal; a second inductor mutually coupled to the first inductor, including a first terminal and a second terminal; a balun-bias switch, including a first input, a second input, a third input, and an output; a second capacitor, including a first terminal, and a second terminal; and a port-switch, including a first input, a second input, a third input, and an output.

Abstract: An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.

Abstract: An apparatus and method are provided. The apparatus includes a multiplexer, including a first input, a second input, a third input, and an output; a first transistor, including a gate, a first terminal, and a second terminal; a first variable capacitor, including a first terminal, a second terminal, and an input; a first inductor, including a first terminal and a second terminal; a second transistor, including a gate, a first terminal, and a second terminal; a second inductor mutually coupled to the first inductor, including a first terminal and a second terminal; a balun-bias switch, including a first input, a second input, a third input, and an output; a second capacitor, including a first terminal, and a second terminal; and a port-switch, including a first input, a second input, a third input, and an output.

Abstract: A dynamically biased baseband current amplifier is provided. The dynamically biased baseband current amplifier includes an input interface; a controller; a variable resistor network; an amplifier stage; a hybrid differential envelope detector and full-wave rectifier; a transconductor; a first variable transistor; a second variable transistor; a third variable transistor; and a fourth variable transistor.

Abstract: An apparatus and a method are provided. The apparatus includes a first capacitor, including a first end and a second end; a second capacitor, including a first end connected to the second end of the first capacitor, and a second end; a variable capacitor, including a first end connected to the second end of the first capacitor, and a second end; a third capacitor, including a first end connected to the first end of the first capacitor, and a second end connected to the second end of the variable capacitor; and a fourth capacitor, including a first end connected to the second end of the third capacitor, and a second end connected to the second end of the second capacitor.

Abstract: A first and second hybrid envelope detector and full-wave rectifier is provided. The first hybrid envelope detector and full-wave rectifier includes a first P-channel Field Effect Transistor (PFET); a second PFET; a first N-channel Field Effect Transistor (NFET); a second NFET; a third NFET; a fourth NFET; a fifth NFET; a controller; a variable transistor; and a variable capacitor. The second hybrid envelope detector and full-wave rectifier includes a first N-channel Field Effect Transistor (NFET); a second NFET; a first P-channel Field Effect Transistor (PFET); a second PFET; a third PFET; a fourth PFET; a fifth PFET; a controller; a variable transistor; and a variable capacitor.

Abstract: A first and second hybrid envelope detector and full-wave rectifier is provided. The first hybrid envelope detector and full-wave rectifier includes a first P-channel Field Effect Transistor (PFET); a second PFET; a first N-channel Field Effect Transistor (NFET); a second NFET; a third NFET; a fourth NFET; a fifth NFET; a controller; a variable transistor; and a variable capacitor. The second hybrid envelope detector and full-wave rectifier includes a first N-channel Field Effect Transistor (NFET); a second NFET; a first P-channel Field Effect Transistor (PFET); a second PFET; a third PFET; a fourth PFET; a fifth PFET; a controller; a variable transistor; and a variable capacitor.

Abstract: A dynamically biased baseband current amplifier is provided. The dynamically biased baseband current amplifier includes an input interface; a controller; a variable resistor network; an amplifier stage; a hybrid differential envelope detector and full-wave rectifier; a transconductor; a first variable transistor; a second variable transistor; a third variable transistor; and a fourth variable transistor.