Patents by Inventor Siddhesh Gaiki

Siddhesh Gaiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory bit cell for in-memory computation
    Patent number: 12333357
    Abstract: A compute-memory circuit included in a computer system may include multiple compute data storage cells coupled to a compute bit line via respective capacitors. The compute data storage cells may store respective bits of a weight value. During a multiply operation, an operand may be used to generate a voltage level on a compute word line that is used to store respective amounts of charge on the capacitors, which are coupled to the compute bit line. The voltage on the compute bit line may be converted into multiple bits whose value is indicative of a product of the operand and the weight value.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: June 17, 2025
    Assignee: Apple Inc.
    Inventors: Michael A. Dreesen, Ajay Bhatia, Michael R. Seningen, Greg M. Hess, Siddhesh Gaiki
  • Memory Bit Cell for In-Memory Computation
    Publication number: 20220101914
    Abstract: A compute-memory circuit included in a computer system may include multiple compute data storage cells coupled to a compute bit line via respective capacitors. The compute data storage cells may store respective bits of a weight value. During a multiply operation, an operand may be used to generate a voltage level on a compute word line that is used to store respective amounts of charge on the capacitors, which are coupled to the compute bit line. The voltage on the compute bit line may be converted into multiple bits whose value is indicative of a product of the operand and the weight value.
    Type: Application
    Filed: May 11, 2021
    Publication date: March 31, 2022
    Inventors: Michael A. Dreesen, Ajay Bhatia, Michael R. Seningen, Greg M. Hess, Siddhesh Gaiki