Patents by Inventor Sie Pook LAW

Sie Pook LAW has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230289308
    Abstract: In a memory system, a switch is connected between a controller and multiple non-volatile storage units, where the switch comprises first and second pins, a data bus, and a plurality of enable outputs. The switch is configured to transmit a signal to enable a communication path between the controller and one of the non-volatile storage units and to receive data over the data bus to be stored in one of the non-volatile storage units when the first and second pins are not asserted. In addition, the switch is configured to receive a command to be executed by one of the non-volatile storage units when the first pin is not asserted and the second pin is asserted. The switch is also configured to receive an address of a storage location within one of the non-volatile storage units when the first pin is asserted and the second pin is not asserted.
    Type: Application
    Filed: May 22, 2023
    Publication date: September 14, 2023
    Inventor: Sie Pook LAW
  • Patent number: 11693802
    Abstract: In a memory system, a switch is connected between a controller and multiple non-volatile storage units, where the switch comprises first and second pins, a data bus, and a plurality of enable outputs. Each of the enable outputs of the switch is connected to an enable input of one of the non-volatile storage units. The switch is configured to transmit a signal to enable a communication path between the controller and one of the non-volatile storage units and to receive data over the data bus to be stored in one of the non-volatile storage units when the first and second pins are not asserted. In addition, the switch is configured to receive a command to be executed by one of the non-volatile storage units when the first pin is not asserted and the second pin is asserted. The switch is also configured to receive an address of a storage location within one of the non-volatile storage units when the first pin is asserted and the second pin is not asserted.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: July 4, 2023
    Assignee: Kioxia Corporation
    Inventor: Sie Pook Law
  • Publication number: 20230004331
    Abstract: An array controller for connection between a solid state drive controller and multiple non-volatile storage units is provided. The array controller comprises a plurality of enable outputs, each of which is connected to an enable input of one of the non-volatile storage units, and a buffer in which data to be written into or read from the non-volatile storage units is stored. The array controller further comprises a control unit configured to enable a communication path between the solid state drive controller and one of the non-volatile storage units according to an address received from the solid state drive controller.
    Type: Application
    Filed: September 5, 2022
    Publication date: January 5, 2023
    Inventor: Sie Pook LAW
  • Patent number: 11435959
    Abstract: An array controller for connection between a solid state drive controller and multiple non-volatile storage units is provided. The array controller comprises a plurality of enable outputs, each of which is connected to an enable input of one of the non-volatile storage units, and a buffer in which data to be written into or read from the non-volatile storage units is stored. The array controller further comprises a control unit configured to enable a communication path between the solid state drive controller and one of the non-volatile storage units according to an address received from the solid state drive controller.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: September 6, 2022
    Assignee: KIOXIA CORPORATION
    Inventor: Sie Pook Law
  • Publication number: 20210382837
    Abstract: In a memory system, a switch is connected between a controller and multiple non-volatile storage units, where the switch comprises first and second pins, a data bus, and a plurality of enable outputs. Each of the enable outputs of the switch is connected to an enable input of one of the non-volatile storage units. The switch is configured to transmit a signal to enable a communication path between the controller and one of the non-volatile storage units and to receive data over the data bus to be stored in one of the non-volatile storage units when the first and second pins are not asserted. In addition, the switch is configured to receive a command to be executed by one of the non-volatile storage units when the first pin is not asserted and the second pin is asserted. The switch is also configured to receive an address of a storage location within one of the non-volatile storage units when the first pin is asserted and the second pin is not asserted.
    Type: Application
    Filed: August 19, 2021
    Publication date: December 9, 2021
    Applicant: KIOXIA CORPORATION
    Inventor: Sie Pook LAW
  • Patent number: 11113222
    Abstract: In a memory system, a switch is connected between a controller and multiple non-volatile storage units, where the switch comprises first and second pins, a data bus, and a plurality of enable outputs. Each of the enable outputs of the switch is connected to an enable input of one of the non-volatile storage units. The switch is configured to transmit a signal to enable a communication path between the controller and one of the non-volatile storage units and to receive data over the data bus to be stored in one of the non-volatile storage units when the first and second pins are not asserted. In addition, the switch is configured to receive a command to be executed by one of the non-volatile storage units when the first pin is not asserted and the second pin is asserted. The switch is also configured to receive an address of a storage location within one of the non-volatile storage units when the first pin is asserted and the second pin is not asserted.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: September 7, 2021
    Assignee: KIOXIA CORPORATION
    Inventor: Sie Pook Law
  • Publication number: 20210165610
    Abstract: An array controller for connection between a solid state drive controller and multiple non-volatile storage units is provided. The array controller comprises a plurality of enable outputs, each of which is connected to an enable input of one of the non-volatile storage units, and a buffer in which data to be written into or read from the non-volatile storage units is stored. The array controller further comprises a control unit configured to enable a communication path between the solid state drive controller and one of the non-volatile storage units according to an address received from the solid state drive controller.
    Type: Application
    Filed: February 3, 2021
    Publication date: June 3, 2021
    Inventor: Sie Pook LAW
  • Patent number: 10942685
    Abstract: An array controller for connection between a solid state drive controller and multiple non-volatile storage units is provided. The array controller comprises a plurality of enable outputs, each of which is connected to an enable input of one of the non-volatile storage units, and a buffer in which data to be written into or read from the non-volatile storage units is stored. The array controller further comprises a control unit configured to enable a communication path between the solid state drive controller and one of the non-volatile storage units according to an address received from the solid state drive controller.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: March 9, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Sie Pook Law
  • Publication number: 20200142849
    Abstract: In a memory system, a switch is connected between a controller and multiple non-volatile storage units, where the switch comprises first and second pins, a data bus, and a plurality of enable outputs. Each of the enable outputs of the switch is connected to an enable input of one of the non-volatile storage units. The switch is configured to transmit a signal to enable a communication path between the controller and one of the non-volatile storage units and to receive data over the data bus to be stored in one of the non-volatile storage units when the first and second pins are not asserted. In addition, the switch is configured to receive a command to be executed by one of the non-volatile storage units when the first pin is not asserted and the second pin is asserted. The switch is also configured to receive an address of a storage location within one of the non-volatile storage units when the first pin is asserted and the second pin is not asserted.
    Type: Application
    Filed: December 24, 2019
    Publication date: May 7, 2020
    Inventor: Sie Pook LAW
  • Patent number: 10521387
    Abstract: In a memory system, a switch is connected between a controller and multiple non-volatile storage units, where the switch comprises first and second pins, a data bus, and a plurality of enable outputs. Each of the enable outputs of the switch is connected to an enable input of one of the non-volatile storage units. The switch is configured to transmit a signal to enable a communication path between the controller and one of the non-volatile storage units and to receive data over the data bus to be stored in one of the non-volatile storage units when the first and second pins are not asserted. In addition, the switch is configured to receive a command to be executed by one of the non-volatile storage units when the first pin is not asserted and the second pin is asserted. The switch is also configured to receive an address of a storage location within one of the non-volatile storage units when the first pin is asserted and the second pin is not asserted.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: December 31, 2019
    Assignee: Toshiba Memory Corporation
    Inventor: Sie Pook Law
  • Publication number: 20190294383
    Abstract: An array controller for connection between a solid state drive controller and multiple non-volatile storage units is provided. The array controller comprises a plurality of enable outputs, each of which is connected to an enable input of one of the non-volatile storage units, and a buffer in which data to be written into or read from the non-volatile storage units is stored. The array controller further comprises a control unit configured to enable a communication path between the solid state drive controller and one of the non-volatile storage units according to an address received from the solid state drive controller.
    Type: Application
    Filed: June 10, 2019
    Publication date: September 26, 2019
    Inventor: Sie Pook LAW
  • Patent number: 10353639
    Abstract: An array controller for connection between a solid state drive controller and multiple non-volatile storage units is provided. The array controller comprises a plurality of enable outputs, each of which is connected to an enable input of one of the non-volatile storage units, and a buffer in which data to be written into or read from the non-volatile storage units is stored. The array controller further comprises a control unit configured to enable a communication path between the solid state drive controller and one of the non-volatile storage units according to an address received from the solid state drive controller.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: July 16, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Sie Pook Law
  • Publication number: 20180225068
    Abstract: An array controller for connection between a solid state drive controller and multiple non-volatile storage units is provided. The array controller comprises a plurality of enable outputs, each of which is connected to an enable input of one of the non-volatile storage units, and a buffer in which data to be written into or read from the non-volatile storage units is stored. The array controller further comprises a control unit configured to enable a communication path between the solid state drive controller and one of the non-volatile storage units according to an address received from the solid state drive controller.
    Type: Application
    Filed: April 2, 2018
    Publication date: August 9, 2018
    Inventor: Sie Pook LAW
  • Patent number: 9933980
    Abstract: An array controller for connection between a solid state drive controller and multiple non-volatile storage units is provided. The array controller comprises a plurality of enable outputs, each of which is connected to an enable input of one of the non-volatile storage units, and a buffer in which data to be written into or read from the non-volatile storage units is stored. The array controller further comprises a control unit configured to enable a communication path between the solid state drive controller and one of the non-volatile storage units according to an address received from the solid state drive controller.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: April 3, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Sie Pook Law
  • Patent number: 9910622
    Abstract: In an array of solid-state drives (SSDs), SSDs in the array are each configured to initiate generation of additional erased memory blocks when an initiation command is received from a host or when the number of erased memory blocks in the SSD falls below a minimum threshold of erased memory blocks for the SSD. The minimum threshold value may be adjusted by the host.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: March 6, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Sie Pook Law
  • Publication number: 20170242791
    Abstract: In an array of solid-state drives (SSDs), SSDs in the array are each configured to initiate generation of additional erased memory blocks when an initiation command is received from a host or when the number of erased memory blocks in the SSD falls below a minimum threshold of erased memory blocks for the SSD. The minimum threshold value may be adjusted by the host.
    Type: Application
    Filed: May 10, 2017
    Publication date: August 24, 2017
    Inventor: Sie Pook LAW
  • Patent number: 9641616
    Abstract: Techniques are disclosed for processing a self-steering storage command via a point-to-point communication protocol. A network adapter in a storage node receives an instance of a current command frame directed to a group of storage nodes and performs a storage operation in response to a storage command associated with the current command frame. The network adapter determines whether all storage nodes have received an instance of the current command frame. If all storage nodes have received an instance of the current command frame, then the network adapter transmits a final completion status frame to a computation node that originated the current command frame. Otherwise, the network adapter generates a next instance of the command frame, and transmits the next instance of the current command frame to an additional storage node in the group of storage nodes.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: May 2, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Sie Pook Law
  • Publication number: 20160283164
    Abstract: In an array of solid-state drives (SSDs), SSDs in the array are each configured to initiate generation of additional erased memory blocks when an initiation command is received from a host or when the number of erased memory blocks in the SSD falls below a minimum threshold of erased memory blocks for the SSD. The minimum threshold value may be adjusted by the host.
    Type: Application
    Filed: June 8, 2016
    Publication date: September 29, 2016
    Inventor: Sie Pook LAW
  • Patent number: RE49133
    Abstract: In an array of solid-state drives (SSDs), SSDs in the array are each configured to initiate generation of additional erased memory blocks when an initiation command is received from a host or when the number of erased memory blocks in the SSD falls below a minimum threshold of erased memory blocks for the SSD. The minimum threshold value may be adjusted by the host.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: July 12, 2022
    Assignee: Kioxia Corporation
    Inventor: Sie Pook Law
  • Patent number: RE49162
    Abstract: In an array of solid-state drives (SSDs), SSDs in the array are each configured to initiate generation of additional erased memory blocks when an initiation command is received from a host or when the number of erased memory blocks in the SSD falls below a minimum threshold of erased memory blocks for the SSD. The minimum threshold value may be adjusted by the host.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: August 9, 2022
    Assignee: Kioxia Corporation
    Inventor: Sie Pook Law