Patents by Inventor Siegfried Tscheternigg

Siegfried Tscheternigg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7015821
    Abstract: EEPROM memory matrix in which column lines are alternatively used as detector lines. A precharge voltage is applied to selected detector lines together with the relevant column line in each case before read-out of the memory columns. If a detector line loses its precharge level during the read-out of the memory cells, light incidence is assumed and a corresponding alarm function is triggered. Preferably column lines adjacent to the column lines that are respectively selected for the data transmission are connected as detector lines.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: March 21, 2006
    Assignee: Infineon Technologies AG
    Inventors: Susanne Gamperl, Siegfried Tscheternigg, Armin Wedel
  • Patent number: 6859011
    Abstract: A method for controlling the charging and discharging phases of a backup capacitor for a data storage medium has the step where the backup capacitor is first discharged to a defined voltage level before it is charged. The capacitor is discharged using a constant current. This ensures that the charging current for the backup capacitor cannot be used to identify what the charge-state of the capacitor was before discharging. Therefore, it is no longer possible to infer the currents that flowed during security-related arithmetic operations in a data processing unit. In one advantageous circuit configuration, a constant current source is formed by a current-mirror circuit, and a comparator is used to compare the voltage on the backup capacitor with a bandgap reference.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: February 22, 2005
    Assignee: Infineon Technologies AG
    Inventors: Siegfried Tscheternigg, Armin Wedel
  • Publication number: 20050036383
    Abstract: EEPROM memory matrix in which column lines are alternatively used as detector lines. A precharge voltage is applied to selected detector lines together with the relevant column line in each case before read-out of the memory columns. If a detector line loses its precharge level during the read-out of the memory cells, light incidence is assumed and a corresponding alarm function is triggered. Preferably column lines adjacent to the column lines that are respectively selected for the data transmission are connected as detector lines.
    Type: Application
    Filed: August 12, 2004
    Publication date: February 17, 2005
    Applicant: Infineon Technologies AG
    Inventors: Susanne Gamperl, Siegfried Tscheternigg, Armin Wedel
  • Publication number: 20030210018
    Abstract: A method for controlling the charging and discharging phases of a backup capacitor for a data storage medium has the step where the backup capacitor is first discharged to a defined voltage level before it is charged. The capacitor is discharged using a constant current. This ensures that the charging current for the backup capacitor cannot be used to identify what the charge-state of the capacitor was before discharging. Therefore, it is no longer possible to infer the currents that flowed during security-related arithmetic operations in a data processing unit. In one advantageous circuit configuration, a constant current source is formed by a current-mirror circuit, and a comparator is used to compare the voltage on the backup capacitor with a bandgap reference.
    Type: Application
    Filed: May 6, 2003
    Publication date: November 13, 2003
    Inventors: Siegfried Tscheternigg, Armin Wedel
  • Patent number: 6646503
    Abstract: A circuit configuration for detecting a functional disturbance has a first and a second differential amplifier. The outputs of the differential amplifiers are connected to the inputs of a gate. One input of the differential amplifiers is in each case connected to a reference potential terminal. The respective other input of the first and second differential amplifiers is connected to a monitoring means, which responds in the event of a change in the supply voltage at a supply potential terminal of the circuit configuration.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: November 11, 2003
    Assignee: Infineon Technologies AG
    Inventors: Robert Allinger, Siegfried Tscheternigg
  • Publication number: 20030080812
    Abstract: A circuit configuration for detecting a functional disturbance has a first and a second differential amplifier. The outputs of the differential amplifiers are connected to the inputs of a gate. One input of the differential amplifiers is in each case connected to a reference potential terminal. The respective other input of the first and second differential amplifiers is connected to a monitoring means, which responds in the event of a change in the supply voltage at a supply potential terminal of the circuit configuration.
    Type: Application
    Filed: November 18, 2002
    Publication date: May 1, 2003
    Inventors: Robert Allinger, Siegfried Tscheternigg