Patents by Inventor Siew Kok Leong

Siew Kok Leong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6372557
    Abstract: A method for forming a lateral DMOS transistor comprises: a) forming a first doped region of a first conductivity type in a semiconductor substrate of the first conductivity type; b) forming an epitaxial layer on the substrate; c) forming a second doped region of the first conductivity type in the epitaxial layer; and d) forming a body region of the first conductivity type in the epitaxial layer. The process of forming the first and second doped regions and the body region includes thermally diffusing dopants in these regions so that the first and second doped regions diffuse and meet one another. The body region also meets and contacts the second doped region. The body region is electrically coupled to the substrate via the first and second doped regions. Source and drain regions are then formed in the epitaxial layer. By forming the transistor in this manner, the electrical resistance between the body region and substrate can be reduced or minimized.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: April 16, 2002
    Assignee: Polyfet RF Devices, Inc.
    Inventor: Siew Kok Leong