Patents by Inventor Siew Lang Teo

Siew Lang Teo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9647183
    Abstract: There is provided a method of fabricating a vertical light emitting diode which includes forming a light emitting diode structure. Forming the light emitting diode structure includes: forming a first material layer of a first conductivity type, forming a second material layer of a second conductivity type, forming a light emitting layer between the first material layer and the second material layer, and forming a plurality of generally ordered photonic nanostructures at a surface of the first material layer through which light generated from the light emitting layer is emitted for enhancing light extraction efficiency of the vertical light emitting diode. In particular, forming a plurality of generally ordered photonic nanostructures includes forming a self-assembled template including generally ordered nanoparticles on the surface of the first material layer to function as a mask for forming the photonic nanostructures at said surface of the first material layer.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: May 9, 2017
    Assignee: Agency for Science, Technology and Research
    Inventors: Sivashankar Krishnamoorthy, Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Siew Lang Teo, Sudhiranjan Tripathy
  • Publication number: 20160049563
    Abstract: There is provided a method of fabricating a vertical light emitting diode which includes forming a light emitting diode structure. Forming the light emitting diode structure includes: forming a first material layer of a first conductivity type, forming a second material layer of a second conductivity type, forming a light emitting layer between the first material layer and the second material layer, and forming a plurality of generally ordered photonic nanostructures at a surface of the first material layer through which light generated from the light emitting layer is emitted for enhancing light extraction efficiency of the vertical light emitting diode. In particular, forming a plurality of generally ordered photonic nanostructures includes forming a self-assembled template including generally ordered nanoparticles on the surface of the first material layer to function as a mask for forming the photonic nanostructures at said surface of the first material layer.
    Type: Application
    Filed: October 30, 2015
    Publication date: February 18, 2016
    Inventors: Sivashankar Krishnamoorthy, Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Siew Lang Teo, Sudhiranjan Tripathy
  • Patent number: 9202979
    Abstract: There is provided a method of fabricating a vertical light emitting diode which includes forming a light emitting diode structure. Forming the light emitting diode structure includes: forming a first material layer of a first conductivity type, forming a second material layer of a second conductivity type, forming a light emitting layer between the first material layer and the second material layer, and forming a plurality of generally ordered photonic nanostructures at a surface of the first material layer through which light generated from the light emitting layer is emitted for enhancing light extraction efficiency of the vertical light emitting diode. In particular, forming a plurality of generally ordered photonic nanostructures includes forming a self-assembled template including generally ordered nanoparticles on the surface of the first material layer to function as a mask for forming the photonic nanostructures at said surface of the first material layer.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: December 1, 2015
    Assignee: Agency for Science, Technology and Research
    Inventors: Sivashankar Krishnamoorthy, Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Siew Lang Teo, Sudhiranjan Tripathy
  • Publication number: 20140183448
    Abstract: There is provided a method of fabricating a vertical light emitting diode which includes forming a light emitting diode structure. Forming the light emitting diode structure includes: forming a first material layer of a first conductivity type, forming a second material layer of a second conductivity type, forming a light emitting layer between the first material layer and the second material layer, and forming a plurality of generally ordered photonic nanostructures at a surface of the first material layer through which light generated from the light emitting layer is emitted for enhancing light extraction efficiency of the vertical light emitting diode. In particular, forming a plurality of generally ordered photonic nanostructures includes forming a self-assembled template including generally ordered nanoparticles on the surface of the first material layer to function as a mask for forming the photonic nanostructures at said surface of the first material layer.
    Type: Application
    Filed: December 27, 2013
    Publication date: July 3, 2014
    Applicant: Agency for Science, Technology and Research
    Inventors: Sivashankar Krishnamoorthy, Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Siew Lang Teo, Sudhiranjan Tripathy