Patents by Inventor Siew-Seong Tan
Siew-Seong Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8810262Abstract: An integrated low-noise sensing circuit with efficient bias stabilization in accordance with the present invention comprises a first capacitance sensing element, a second capacitance sensing element, a sub-threshold transistor and an amplifier circuit wherein the first stage is an input transistor. The second capacitance sensing element is connected to the first capacitance sensing element. The sub-threshold transistor comprises a body, a gate, a source, a drain, a source-body junction diode and a bulk. The gate forms on top of the body. The source forms on the body and is connected to the first capacitance sensing element and the second capacitance sensing element. The drain forms on the body and is connected to the gate and the amplifier output terminal. The source-body junction diode comprises an anode and a cathode. The anode is connected to the ground.Type: GrantFiled: November 13, 2012Date of Patent: August 19, 2014Assignee: National Tsing Hua UniversityInventors: Yung-Jane Hsu, Siew-Seong Tan
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Publication number: 20140132284Abstract: An integrated low-noise sensing circuit with efficient bias stabilization in accordance with the present invention comprises a first capacitance sensing element, a second capacitance sensing element, a sub-threshold transistor and an amplifier circuit wherein the first stage is an input transistor. The second capacitance sensing element is connected to the first capacitance sensing element. The sub-threshold transistor comprises a body, a gate, a source, a drain, a source-body junction diode and a bulk. The gate forms on top of the body. The source forms on the body and is connected to the first capacitance sensing element and the second capacitance sensing element. The drain forms on the body and is connected to the gate and the amplifier output terminal The source-body junction diode comprises an anode and a cathode. The anode is connected to the ground.Type: ApplicationFiled: November 13, 2012Publication date: May 15, 2014Applicant: NATIONAL TSING HUA UNIVERSITYInventors: Yung-Jane HSU, Siew-Seong TAN
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Patent number: 8476910Abstract: A capacitive sensor with a calibration mechanism is provided. The capacitive sensor includes a set of sensing capacitors to generate a capacitance variation, a subtraction circuit and an integration circuit. The subtraction circuit includes a first capacitor array to generate offset-adjusting charges and a second capacitor array to generate subtraction charges according to an initial offset and a sensitivity of the sensing capacitors respectively. The integration circuit includes two input ends, wherein one of them is connected to the sensing capacitors and the subtraction circuit. During a sensing period, the integration circuit performs integration according to the capacitance variation and performs cancellation of the effect of the initial offset according to the offset-adjusting charges to generate an integration output signal that is continuously subtracted by the subtraction charges during a computing period to generate a subtraction count. A capacitive sensing method is disclosed herein as well.Type: GrantFiled: June 23, 2010Date of Patent: July 2, 2013Assignee: Memsor CorporationInventors: Li-Ken Yeh, Siew-Seong Tan
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Patent number: 8318526Abstract: A manufacturing method for manufacturing a light-sensing structure is provided. The manufacturing method includes the steps as follows. (a) A circuit layer is formed on an upper surface of a first substrate, wherein the first substrate includes at least one light-sensing device and the circuit layer includes at least one device structure and at least one release feature that is made of metal and is formed on part of the light-sensing device and the device structure. (b) A first light-filtering layer is formed on part of the circuit layer. (c) The release feature is removed by a wet-etching process.Type: GrantFiled: January 30, 2011Date of Patent: November 27, 2012Assignee: Memsor CorporationInventors: Siew-Seong Tan, Yi-Hsiang Chiu, Jen-Chieh Chen
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Patent number: 8252695Abstract: Disclosed herein is a method for manufacturing a micro-electromechanical structure. The method includes the following steps. A circuitry layer having a release feature is formed on an upper surface of a first substrate. A passive layer is formed on the circuitry layer without covering the release feature. The release feature is removed to expose the first substrate by a wet etching process. A portion of the exposed first substrate is anisotropically etched. A second substrate is disposed above the circuitry layer. A cavity is formed in the lower surface of the first substrate. The cavity is filled with a polymeric material. A portion of the first substrate under the microstructure is removed to release the micro-electromechanical structure.Type: GrantFiled: November 29, 2010Date of Patent: August 28, 2012Assignee: Memsor CorporationInventor: Siew-Seong Tan
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Publication number: 20120034729Abstract: A manufacturing method for manufacturing a light-sensing structure is provided. The manufacturing method includes the steps as follows. (a) A circuit layer is formed on an upper surface of a first substrate, wherein the first substrate includes at least one light-sensing device and the circuit layer includes at least one device structure and at least one release feature that is made of metal and is formed on part of the light-sensing device and the device structure. (b) A first light-filtering layer is formed on part of the circuit layer. (c) The release feature is removed by a wet-etching process.Type: ApplicationFiled: January 30, 2011Publication date: February 9, 2012Applicant: MEMSOR CORPORATIONInventors: Siew-Seong Tan, Yi-Hsiang Chiu, Jen-Chieh Chen
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Patent number: 8093085Abstract: A method of forming a suspension object on a monolithic substrate is provided. A silicon base layer of the monolithic substrate has a circuit layer composed of at least one wet etching region, at least one circuit region, and at least one microstructure region. The wet etching region is used to partition the circuit region and the microstructure region, and extends downwards to a surface of the silicon base layer, so as to form an etching path for etching the silicon base layer from above the substrate. Next, an upper surface and a lower surface of the silicon base layer are respectively etched through dry etching, such that the microstructure region is suspended.Type: GrantFiled: June 15, 2010Date of Patent: January 10, 2012Assignee: Memsor CorporationInventor: Siew Seong Tan
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Publication number: 20110306158Abstract: A method of forming a suspension object on a monolithic substrate is provided. A silicon base layer of the monolithic substrate has a circuit layer composed of at least one wet etching region, at least one circuit region, and at least one microstructure region. The wet etching region is used to partition the circuit region and the microstructure region, and extends downwards to a surface of the silicon base layer, so as to form an etching path for etching the silicon base layer from above the substrate. Next, an upper surface and a lower surface of the silicon base layer are respectively etched through dry etching, such that the microstructure region is suspended.Type: ApplicationFiled: June 15, 2010Publication date: December 15, 2011Inventor: Siew Seong TAN
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Publication number: 20110250760Abstract: Disclosed herein is a method for manufacturing a micro-electromechanical structure. The method includes the following steps. A circuitry layer having a release feature is formed on an upper surface of a first substrate. A passive layer is formed on the circuitry layer without covering the release feature. The release feature is removed to expose the first substrate by a wet etching process. A portion of the exposed first substrate is anisotropically etched. A second substrate is disposed above the circuitry layer. A cavity is formed in the lower surface of the first substrate. The cavity is filled with a polymeric material. A portion of the first substrate under the microstructure is removed to release the micro-electromechanical structure.Type: ApplicationFiled: November 29, 2010Publication date: October 13, 2011Applicant: MEMSOR CORPORATIONInventor: Siew-Seong TAN
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Publication number: 20110248723Abstract: A capacitive sensor with a calibration mechanism is provided. The capacitive sensor includes a set of sensing capacitors to generate a capacitance variation, a subtraction circuit and an integration circuit. The subtraction circuit includes a first capacitor array to generate offset-adjusting charges and a second capacitor array to generate subtraction charges according to an initial offset and a sensitivity of the sensing capacitors respectively. The integration circuit includes two input ends, wherein one of them is connected to the sensing capacitors and the subtraction circuit. During a sensing period, the integration circuit performs integration according to the capacitance variation and performs cancellation of the effect of the initial offset according to the offset-adjusting charges to generate an integration output signal that is continuously subtracted by the subtraction charges during a computing period to generate a subtraction count. A capacitive sensing method is disclosed herein as well.Type: ApplicationFiled: June 23, 2010Publication date: October 13, 2011Applicant: MEMSOR CORPORATIONInventors: Li-Ken YEH, Siew-Seong TAN
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Patent number: 7863063Abstract: A method for fabricating a sealed cavity microstructure comprises the steps of: forming an insulation layer with a micro-electro-mechanical structure on an upper surface of a silicon substrate, the micro-electro-mechanical structure includes at least one suspended structure and at least one conductive structure between which is disposed a spacer region; after an etching, filling a sacrificial layer into the spacer region and on the surface of the conductive structure; forming holes in the sacrificial layer correspondingly to the conductive structure; depositing a cap layer into the holes and the surface; after removing the sacrificial layer, utilizing the clearance of the cap layer to carry out a further etching to realize the suspension of the micro-electro-mechanical structure; and finally, utilizing a sealing layer to achieve the sealing effect. By such arrangements, the exposure of the micro-electro-mechanical structure can be effectively prevented, and the final package cost can be reduced.Type: GrantFiled: March 4, 2008Date of Patent: January 4, 2011Assignee: MEMSmart Semiconductor Corp.Inventor: Siew-Seong Tan
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Patent number: 7829364Abstract: A suspension microstructure and its fabrication method, in which the method comprises the steps of: forming at least one insulation layer with inner micro-electro-mechanical structures on an upper surface of a silicon substrate, the micro-electro-mechanical structure includes at least one microstructure and a plurality of metal circuits that are independent from each other, the micro-electro-mechanical structures have an exposed portion on the surface of the insulation layer, and the exposed portion is provided with through holes or stacked metal-via layers correspondingly to the predetermined etching spaces of the micro-electro-mechanical structures, the above predetermined etching spaces and the stacked metal-via layers only penetrate the insulation layer; forming a photoresist with an opening on the upper surface of the exposed portion, and the opening of the photoresist is located outside all the through holes or the stacked metal-via layers; subsequently, conducting etching to realize the suspension of tType: GrantFiled: October 2, 2008Date of Patent: November 9, 2010Assignee: MEMSMART Semiconductor CorporationInventor: Siew-Seong Tan
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Patent number: 7666702Abstract: A method for fabricating a microstructure is to form at least one insulation layer including a micro-electro-mechanical structure therein over an upper surface of a silicon substrate. The micro-electro-mechanical structure includes at least one microstructure and a metal sacrificial structure that are independent with each other. In the metal sacrificial structure are formed a plurality of metal layers and a plurality of metal via layers connected to the respective metal layers. A barrier layer is formed over an upper surface of the insulation layer, and an etching stop layer is subsequently formed over a lower surface of the silicon substrate. An etching operation is carried out from the lower surface of the silicon substrate to form a space corresponding to the micro-electro-mechanical structure, and then the metal sacrificial structure is etched, thus achieving a microstructure suspension.Type: GrantFiled: November 28, 2007Date of Patent: February 23, 2010Assignee: MEMSmart Semiconductor Corp.Inventors: Sheng-Hung Li, Siew-Seong Tan, Cheng-Yen Liu, Li-Ken Yeh
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Publication number: 20090243084Abstract: A suspension microstructure and its fabrication method, in which the method comprises the steps of: forming at least one insulation layer with inner micro-electro-mechanical structures on an upper surface of a silicon substrate, the micro-electro-mechanical structure includes at least one microstructure and a plurality of metal circuits that are independent from each other, the micro-electro-mechanical structures have an exposed portion on the surface of the insulation layer, and the exposed portion is provided with through holes or stacked metal-via layers correspondingly to the predetermined etching spaces of the micro-electro-mechanical structures, the above predetermined etching spaces and the stacked metal-via layers only penetrate the insulation layer; forming a photoresist with an opening on the upper surface of the exposed portion, and the opening of the photoresist is located outside all the through holes or the stacked metal-via layers; subsequently, conducting etching to realize the suspension of tType: ApplicationFiled: October 2, 2008Publication date: October 1, 2009Inventor: Siew-Seong TAN
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Publication number: 20090229369Abstract: A capacitor compensation structure and method for a micro-electro-mechanical system, an insulating layer is formed on an upper surface of a silicon substrate, and a capacitor having at least one basic capacitive plate and one compensation capacitive plate is provided in the insulating layer. The basic capacitive plate and the compensation capacitive plate are independent from each other, each of the basic and compensation capacitive plates has a metallic circuit connected to outside, and the metallic circuits are connected to a switch. Thereby, the problem of mismatching of the capacitor can be efficiently avoided, and the difference between the products of different lots can be reduced.Type: ApplicationFiled: March 17, 2008Publication date: September 17, 2009Inventor: Siew-Seong Tan
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Publication number: 20090227060Abstract: A method for fabricating a sealed cavity microstructure comprises the steps of: forming an insulation layer with a micro-electro-mechanical structure on an upper surface of a silicon substrate, the micro-electro-mechanical structure includes at least one suspended structure and at least one conductive structure between which is disposed a spacer region; after an etching, filling a sacrificial layer into the spacer region and on the surface of the conductive structure; forming holes in the sacrificial layer correspondingly to the conductive structure; depositing a cap layer into the holes and the surface; after removing the sacrificial layer, utilizing the clearance of the cap layer to carry out a further etching to realize the suspension of the micro-electro-mechanical structure; and finally, utilizing a sealing layer to achieve the sealing effect. By such arrangements, the exposure of the micro-electro-mechanical structure can be effectively prevented, and the final package cost can be reduced.Type: ApplicationFiled: March 4, 2008Publication date: September 10, 2009Inventor: Siew-Seong TAN
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Publication number: 20090137113Abstract: A method for fabricating a microstructure is to form at least one insulation layer including a micro-electro-mechanical structure therein over an upper surface of a silicon substrate. The micro-electro-mechanical structure includes at least one microstructure and a metal sacrificial structure that are independent with each other. In the metal sacrificial structure are formed a plurality of metal layers and a plurality of metal via layers connected to the respective metal layers. A barrier layer is formed over an upper surface of the insulation layer, and an etching stop layer is subsequently formed over a lower surface of the silicon substrate. An etching operation is carried out from the lower surface of the silicon substrate to form a space corresponding to the micro-electro-mechanical structure, and then the metal sacrificial structure is etched, thus achieving a microstructure suspension.Type: ApplicationFiled: November 28, 2007Publication date: May 28, 2009Inventors: Sheng Hung Li, Siew-Seong Tan, Cheng-Yen Liu, Li-Ken Yeh
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Publication number: 20090061578Abstract: A method of manufacturing a semiconductor microstructure comprises: forming a standard CMOS wafer with at least one micro-electro-mechanical structure on a top surface of a silicon substrate, forming at least one sacrificial layer and one resist layer sequentially on the top surface of the CMOS wafer; forming an etching resist layer on a lower rear surface of the silicon substrate, etching the lower rear surface of the silicon base by deep reactive ion etching or wet etching to form a space corresponding to the micro-electro-mechanical structure, and etching the CMOS wafer and the sacrificial layer, respectively, to cause suspension of the micro-electro-mechanical structure. Such arrangements effectively prevent the occurrence of undercut, reduce the exposure and possibility of damage of the micro-electro-mechanical structure, and effectively save the package cost.Type: ApplicationFiled: August 30, 2007Publication date: March 5, 2009Inventors: Siew-Seong Tan, Chen-Yen Liu