Abstract: An amplification system can include a bias booster circuit and an amplifier that amplifies an input signal to drive a load. The bias boosting circuit can include a negative bias booster that applies a charge to an input node of the amplifier in response to a negative half-cycle of the input signal that exceeds a boost threshold level. The bias boosting circuit can also include a positive bias booster that discharges the input node of the amplifier during a positive half-cycle of the input signal that exceeds the boost threshold level. The discharging by the positive bias booster is slower than the charging by the negative bias booster to induce a bias voltage increase from a quiescent bias voltage on the input node of the amplifier.

Abstract: An amplification system can include a bias booster circuit and an amplifier that amplifies an input signal to drive a load. The bias boosting circuit can include a negative bias booster that applies a charge to an input node of the amplifier in response to a negative half-cycle of the input signal that exceeds a boost threshold level. The bias boosting circuit can also include a positive bias booster that discharges the input node of the amplifier during a positive half-cycle of the input signal that exceeds the boost threshold level. The discharging by the positive bias booster is slower than the charging by the negative bias booster to induce a bias voltage increase from a quiescent bias voltage on the input node of the amplifier.

Abstract: Metallization layer structures for reduced changes in radio frequency characteristics due to registration error and associated methods are provided herein. An example resonator includes a first conductive layer defining an error limiting feature and a second conductive layer. The resonator further includes at least one communication feature configured to electrically couple the first conductive layer and the second conductive layer at a communication position. The error limiting feature is configured to reduce changes in radio frequency characteristics of the resonator due to registration error. Methods of manufacturing resonators are also provided herein.

Abstract: A current mirror circuit for biasing a power amplifier includes a modified Wilson current mirror with a pair of first and second mirror transistors connected to a third transistor. The first mirror transistor is configured for operating in a saturation mode, with a gate voltage of the first mirror transistor being lower than a gate voltage of the power amplifier. The third transistor charges the power amplifier circuit during a positive half cycle of an input signal and the first mirror transistor discharges the power amplifier circuit during a negative half cycle of the input signal at different rates.

Abstract: A circuit includes a dielectric layer, a first via residing in the dielectric layer, a second via residing in the dielectric layer, and an inductor. The inductor includes a first inductor element and a second inductor element. The first inductor element is formed by a first transmission line including a plurality of segments defined between a first end and a second end thereof. The second inductor element is formed by a second transmission line including a plurality of segments defined between a first end and a second end thereof. A first port is defined by one segment of the plurality of segments of the second transmission line, wherein current flows in the inductor in the same direction from a second port defined at the first end of the first transmission line to the first port, and from the first port to a third port defined at the second via.

Abstract: An RF power amplifier circuit has a signal input and a signal output. An input matching network connected to the signal input, and an output matching network is connected to the signal output. There is a power amplifier with an input connected to the input matching network, and an output connected to the output matching network. A bias boosting circuit is connected to the input of the power amplifier, and the bias boosting circuit comprises a cascode current mirror that is defined by a first cascode circuit and a second cascode circuit, and a biasing transistor that is connected to an output of the cascode current mirror. The biasing transistor, together with the power amplifier, defines a current mirror. The bias boosting circuit is thus a dual current mirror circuit that boosts the bias of the power amplifier.

Abstract: Various embodiments provide a bias circuit for a radio frequency (RF) power amplifier (PA) to provide a direct current (DC) bias voltage, with bias boosting, to the RF PA. The bias circuit may include a bias transistor that forms a current mirror with an amplifier transistor of the RF PA. The bias circuit may further include a first resistor coupled between the gate terminal and the drain terminal of the bias transistor to block RF signals from the gate terminal of the bias transistor. The bias circuit may further include a second resistor coupled between the drain terminal of the bias transistor and the RF PA (e.g., the gate terminal of the amplifier transistor). An amount of bias boosting of the DC bias voltage provided by the bias circuit may be based on an impedance value of the second resistor.

Abstract: Metallization layer structures for reduced changes in radio frequency characteristics due to registration error and associated methods are provided herein. An example resonator includes a first conductive layer defining an error limiting feature and a second conductive layer. The resonator further includes at least one communication feature configured to electrically couple the first conductive layer and the second conductive layer at a communication position. The error limiting feature is configured to reduce changes in radio frequency characteristics of the resonator due to registration error. Methods of manufacturing resonators are also provided herein.

Abstract: Various embodiments provide a bias circuit for a radio frequency (RF) power amplifier (PA) to provide a direct current (DC) bias voltage, with bias boosting, to the RF PA. The bias circuit may include a bias transistor that forms a current mirror with an amplifier transistor of the RF PA. The bias circuit may further include a first resistor coupled between the gate terminal and the drain terminal of the bias transistor to block RF signals from the gate terminal of the bias transistor. The bias circuit may further include a second resistor coupled between the drain terminal of the bias transistor and the RF PA (e.g., the gate terminal of the amplifier transistor). An amount of bias boosting of the DC bias voltage provided by the bias circuit may be based on an impedance value of the second resistor.

Abstract: Metallization layer structures for reduced changes in radio frequency characteristics due to registration error and associated methods are provided herein. An example resonator includes a first conductive layer defining an error limiting feature and a second conductive layer. The resonator further includes at least one communication feature configured to electrically couple the first conductive layer and the second conductive layer at a communication position. The error limiting feature is configured to reduce changes in radio frequency characteristics of the resonator due to registration error. Methods of manufacturing resonators are also provided herein.

Abstract: A radio transmitter and method controls efficiency of each of a plurality of power amplifiers that amplify a corresponding one of a plurality of radio frequency signals for a beamforming transmission by a corresponding one of a plurality of antennas. Each of the plurality of power amplifiers is controlled to operate with one or more operating parameters that optimize the efficiency for an output power level of corresponding ones of the radio frequency signals. Transmit weights for transmit signals are determined and updated on a per-packet basis.

Abstract: A radio transmitter and method controls efficiency of each of a plurality of power amplifiers that amplify a corresponding one of a plurality of radio frequency signals for a beamforming transmission by a corresponding one of a plurality of antennas. Each of the plurality of power amplifiers is controlled to operate with one or more operating parameters that optimize the efficiency for an output power level of corresponding ones of the radio frequency signals. Transmit weights for transmit signals are determined and updated on a per-packet basis.

Abstract: The present invention provides methods and apparatuses for an amplifier circuit for amplifying an input signal. An amplifier circuit for amplifying an input signal comprises an amplifying transistor circuit having a power transistor and a dc bias circuit having a plurality of current mirror circuits and a discharge transistor wherein the discharge transistor and the power transistor form a combined current mirror circuit to control quiescent current in the power transistor.

Abstract: An amplifier circuit (1) includes an amplifying transistor (QØ) and an impedance-controllable dc bias circuit (2) for biasing the amplifier transistor (QØ) to obtain a conduction angle of at least about 180°. The dc bias circuit (2) includes a self-bias boosting circuit having separate current sources (Ibias, Iclass) for independently controlling the output impedance of the dc bias circuit (2) and the quiescent current of the amplifier transistor (QØ), and has a Wilson current-mirror (Q4, Q5, Q6, Q7) integrated with a cascode current-mirror circuit (Q2, Q3, Q8) to form an extended Wilson current-mirror circuit (Q2-Q8) having an output coupled to a control terminal of the amplifying transistor (QØ) by a resistor (R1), and a capacitor (C2) coupled from the extended Wilson current-mirror circuit (Q2-Q8) to a common terminal (Gnd).

Abstract: An amplifier circuit (1) includes an amplifying transistor (QØ) and a dc bias circuit (2) for biasing the amplifier transistor (QØ) to obtain a conduction angle of at least about 180°. The dc bias circuit (2) includes a self-bias boosting circuit which has a Wilson current-mirror (Q4, Q5, Q6) integrated with a cascode current-mirror circuit (Q2, Q3) to form an extended Wilson current-mirror circuit (Q2-Q6) having an output coupled to a control terminal of the amplifying transistor (QØ) by a resistor (R1), and a capacitor (C2) coupled from the extended Wilson current-mirror circuit (Q2-Q6) to a common terminal (Gnd).

Abstract: The present invention provides methods and apparatuses for an amplifier circuit for amplifying an input signal. An amplifier circuit for amplifying an input signal comprises an amplifying transistor circuit having a power transistor and a dc bias circuit having a plurality of current mirror circuits and a discharge transistor wherein the discharge transistor and the power transistor form a combined current mirror circuit to control quiescent current in the power transistor.

Abstract: An amplifier circuit (1) includes an amplifying transistor (QO) and a do bias circuit (2) for biasing the amplifier transistor (QO) to obtain a conduction angle of at least about 180°. The do bias circuit (2) includes a self-bias boosting circuit which has a Wilson current-mirror (Q4, Q5, Q6) integrated with a cascode current-mirror circuit (Q2, Q3) to form an extended Wilson current-mirror circuit (Q2-Q6) having an output coupled to a control terminal of the amplifying transistor (QO) by a resistor (R1), and a capacitor (C2) coupled from the extended Wilson current-mirror circuit (Q2-Q6) to a common terminal (Gnd).

Abstract: A transmitter comprises a plurality of transmit antennas for simultaneously transmitting weighted signals according to a channel transfer function. Each antenna has a corresponding amplifier that is bias controlled according to the transmit weights derived for the antenna transmission. A baseband processor produces digital weighted signals for upconversion and amplification by the amplifiers. Each amplifier is accompanied by a bias circuit responsive to the transmit weights. Alternatively, or additionally, corresponding DC/DC converters are used to control the operating voltage of the amplifiers.

Abstract: An amplifier circuit (1) includes an amplifying transistor (QØ) and an impedance-controllable dc bias circuit (2) for biasing the amplifier transistor (QØ) to obtain a conduction angle of at least about 180°. The dc bias circuit (2) includes a self-bias boosting circuit having separate current sources (Ibias, Iclass) for independently controlling the output impedance of the dc bias circuit (2) and the quiescent current of the amplifier transistor (QØ), and has a Wilson current-mirror (Q4, Q5, Q6, Q7) integrated with a cascode current-mirror circuit (Q2, Q3, Q8) to form an extended Wilson current-mirror circuit (Q2-Q8) having an output coupled to a control terminal of the amplifying transistor (QØ) by a resistor (R1), and a capacitor (C2) coupled from the extended Wilson current-mirror circuit (Q2-Q8) to a common terminal (Gnd).

Abstract: Systems and methods for optimizing the efficiency of each of a plurality of power amplifiers that amplify a corresponding one of a plurality of radio frequency signals for transmission by a corresponding one of a plurality of antennas. Using transmit beamforming, the power of each amplified signal output by the power amplifiers may not be the same for all the power amplifiers, and may vary with changes in the communication channel between the transmitting device and receiving device. Each of the plurality of power amplifiers is controlled to operate with one or more operating parameters that optimize the efficiency for an output power level of corresponding ones of the radio frequency signals. By adjusting one or more operating parameters of each power amplifier according to changing requirements (e.g., the destination device and channel conditions), the efficiency of each power amplifier can be optimized.