Abstract: A method for manufacturing an optically triggered lateral thyristor is to form an anode region by providing a first opening in an insulating layer formed on a semiconductor substrate, a diffusion layer by providing a second opening in the insulating layer to be spaced from the anode region, a base-forming region by providing a third opening in the insulating layer externally adjacent to the second opening, and a base region and simultaneously a cathode region by means of double diffusion through the third opening, the base region having a lateral width determined by a diffusion difference between the base and cathode regions for effective minimization of the width.

Abstract: A low output capacitance, double-diffused field effect transistor effectively realizes the reduction in the output capacitance, by providing a drain electrode on one surface of a first conduction type semiconductor substrate, forming on the other surface of the substrate, through a double diffusion, second conduction type well regions and first conduction type source regions for connection therewith of a source electrode, forming channel regions in surface zone of the well regions disposed between first conduction type zone of the semiconductor substrate and the source regions, above which channel regions being provided gate electrodes through an insulating film, forming a guard ring region surrounding the well regions, and connecting at least one capacitance component means to the gate electrodes.

Abstract: A solid state relay circuit includes a MOSFET receiving a photovoltaic output generated across a photovoltaic diode array responsive to a light signal from a light emitting element, a control electrode of a normally ON type driving transistor made to be at a high impedance state by a voltage generated across an impedance element connected in series to the photovoltaic diode array upon application of the photovoltaic output across the gate and source of the MOSFET and at a low impedance state upon disappearance of the photovoltaic output is connected to a connecting point between the diode array and the impedance element, and the driving transistor is connected across the gate and source of the MOSFET with a resistor interposed. A falling gradient of output signal upon being turned OFF of the relay circuit is made thereby sufficiently gentle, and relay operation upon being turned OFF can be minimized in response time.

Abstract: A double-diffused metal-oxide-semiconductor field effect transistor (DMOSFET) device comprising an insulating layer having an opening on the top surface of a semiconductor wafer, channel regions and well regions and source regions formed through two stage deffusions of impurity materials respectively of a different conductivity type from and the same conductivity type as the wafer and carried out through the opening, and further comprising gate, source and drain electrodes which are formed after mashes provided on a surface area where the drain regions and the source electrode regions that are to be connected to the well regions and source regions and a further ion-implantation of an impurity material of the same conductivity type as the wafer into the channel regions, with the threshold voltage controlled to achieve a depletion type.

Abstract: A method for manufacturing double-diffused metal-oxide-semiconductor field effect transistor (DMOSFET) device is to form an insulating layer having an opening in top surface on a semiconductor wafer, channel regions and well regions and source regions through two stage diffusions of impurity materials respectively of a different conductivity type from and the same conductivity type as the wafer and carried out through the opening, and further gate, source and drain electrodes are formed after masks provided on a surface area where the drain regions and the source electrode regions that are to be connected to the well regions and source regions and a further ion-implantation of an impurity material of the same conductivity type as the wafer into the channel regions, with the threshold voltage controlled to achieve a depletion type.

Abstract: A solid state relay includes a MOS FET receiving a photovoltaic output generated across a photovoltaic diode array responsive to a light signal from a light-emitting element, and a normally ON driving transistor connected to the MOS FET, the driving transistor being connected at control electrode to a connection point between the photovoltaic diode array and an impedance element to be biased by a voltage generated across the impedence element during generation of the photovoltaic output across the photovoltaic diode array to have a high impedance state, whereby the relay can be prevented from providing at output terminals any intermediate state between ON and OFF states even when an input current to the relay is in lower range, and a high speed relay operation is realized.

Abstract: A solid state relay includes a MOS FET receiving a photovoltaic output generated across a photovoltaic diode array responsive to a light signal from a light-emitting element, and a normally ON driving transistor connected to the MOS FET, the driving transistor being connected at control electrode to a connection point between the photovoltaic diode array and an impedance element to be biased by a voltage generated across the impedance element during generation of the photovoltaic output across the photovoltaic diode array to have a high impedance state, whereby the relay can be prevented from providing at output terminals any intermediate state between ON and OFF states even when an input current to the relay is in lower range, and a high speed relay operation is realized.