Patents by Inventor Sigrid Wabnig

Sigrid Wabnig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE USING WET ETCHING AND DRY ETCHING AND SEMICONDUCTOR DEVICE
    Publication number: 20220235470
    Abstract: A method for fabricating a semiconductor device comprises depositing a TiW layer on a semiconductor substrate, depositing a Ti layer on the TiW layer, depositing a Ni alloy layer on the Ti layer, depositing an Ag layer on the Ni alloy layer, at least partially covering the Ag layer with photoresist, wet etching the Ag layer and the Ni alloy layer, and dry etching the Ti layer and the TiW layer.
    Type: Application
    Filed: January 24, 2022
    Publication date: July 28, 2022
    Inventors: Saurabh Roy, Matteo Dainese, Michael Ehmann, Hiroshi Narahashi, Johanna Schlaminger, Katharina Teichmann, Sigrid Wabnig
  • Semiconductor packages and methods for producing the same
    Patent number: 9013890
    Abstract: In one embodiment, a semiconductor package includes an isolating container having a recess, which forms an inner membrane portion and an outer rim portion. The rim portion is thicker than the membrane portion. The package includes a semiconductor chip disposed in the recess and a backplane disposed under the membrane portion of the isolating container.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: April 21, 2015
    Assignee: Infineon Technologies AG
    Inventors: Udo Ausserlechner, Carsten von Koblinski, Sigrid Wabnig, Volker Strutz, Robert Grünberger
  • Semiconductor Packages and Methods For Producing The Same
    Publication number: 20120112365
    Abstract: In one embodiment, a semiconductor package includes an isolating container having a recess, which forms an inner membrane portion and an outer rim portion. The rim portion is thicker than the membrane portion. The package includes a semiconductor chip disposed in the recess and a backplane disposed under the membrane portion of the isolating container.
    Type: Application
    Filed: January 11, 2012
    Publication date: May 10, 2012
    Applicant: Infineon Technologies AG
    Inventors: Udo Ausserlechner, Carsten von Koblinski, Sigrid Wabnig, Volker Strutz, Robert Grünberger