Abstract: A computer-implemented method comprises: obtaining, by the settlement device, a biometric feature of the user; determining, by the settlement device, that the obtained biometric feature matches a stored biometric feature, wherein the stored biometric feature corresponds to an account identifier; and in response to determining that the obtained biometric feature matches the stored biometric feature, performing, by the settlement device, a settlement of an account associated with the account identifier that corresponds to the stored biometric feature.

Abstract: A multiprocessor system providing transactional memory. A first processor initiates a transaction which includes reading first data into a private cache of the first processor, and performing a write operation on the first data in the private cache of the first processor. In response to detecting that prior to the write operation the first data was last modified by a second processor, the first processor writes the modified first data into a last level cache (LLC) accessible by the multiple processors. The system sets a cache line state index string to indicate that the first data written into the LLC was last modified by the first processor, invalidates the first data in the private cache of the first processor, and commits the transaction to the transactional memory system. This allows more efficient accesses to the data by the multiple processors.

Abstract: A multiprocessor system providing transactional memory. A first processor initiates a transaction which includes reading first data into a private cache of the first processor, and performing a write operation on the first data in the private cache of the first processor. In response to detecting that prior to the write operation the first data was last modified by a second processor, the first processor writes the modified first data into a last level cache (LLC) accessible by the multiple processors. The system sets a cache line state index string to indicate that the first data written into the LLC was last modified by the first processor, invalidates the first data in the private cache of the first processor, and commits the transaction to the transactional memory system. This allows more efficient accesses to the data by the multiple processors.

Abstract: A multiprocessor system providing transactional memory. A first processor initiates a transaction which includes reading first data into a private cache of the first processor, and performing a write operation on the first data in the private cache of the first processor. In response to detecting that prior to the write operation the first data was last modified by a second processor, the first processor writes the modified first data into a last level cache (LLC) accessible by the multiple processors. The system sets a cache line state index string to indicate that the first data written into the LLC was last modified by the first processor, invalidates the first data in the private cache of the first processor, and commits the transaction to the transactional memory system. This allows more efficient accesses to the data by the multiple processors.

Abstract: Detecting data dependencies of instructions associated with threads in a simultaneous multithreading (SMT) scheme is disclosed, including: dividing a plurality of comparators of an SMT-enabled device into groups of comparators corresponding to respective ones of threads associated with the SMT-enabled device; simultaneously distributing a first set of instructions associated with a first thread of the plurality of threads to a corresponding first group of comparators from the plurality of groups of comparators and distributing a second set of instructions associated with a second thread of the plurality of threads to a corresponding second group of comparators from the plurality of groups of comparators; and simultaneously performing data dependency detection on the first set of instructions associated with the first thread using the corresponding first group of comparators and performing data dependency detection on the second set of instructions associated with the second thread using the corresponding seco

Abstract: A multiprocessor system providing transactional memory. A first processor initiates a transaction which includes reading first data into a private cache of the first processor, and performing a write operation on the first data in the private cache of the first processor. In response to detecting that prior to the write operation the first data was last modified by a second processor, the first processor writes the modified first data into a last level cache (LLC) accessible by the multiple processors. The system sets a cache line state index string to indicate that the first data written into the LLC was last modified by the first processor, invalidates the first data in the private cache of the first processor, and commits the transaction to the transactional memory system. This allows more efficient accesses to the data by the multiple processors.

Abstract: When a first transaction needs to conduct a writing operation to first data, after there is a determination that there exists a second transaction that has conducted a reading operation of the first data or is to conduct a reading operation of the first data, a record that indicates a conflict between the writing operation of the first transaction and the reading operation of the second transaction is generated. A processing of the second transaction is performed. After the processing is completed, the second transaction is submitted and the first transaction is notified according to the record. A processing of the first transaction is performed. After the processing is completed and a notification of the second transaction is received, the first transaction is submitted. The present techniques improve concurrently visiting transaction memory at a multi-core system, avoid rollbacks incurred by conflicts, and improve overall system performance.