Patents by Inventor Sil Wan Chang

Sil Wan Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11726871
    Abstract: A storage system may include a memory device including a first region including a single-level cell and a second region different from the first region, and a storage controller configured to read data from the first region at a first gear level of a plurality of gear levels, determine an error level of the read data and a state of the memory device, and change the first gear level to a second gear level of the plurality of gear levels based on the determined error level of the data and the determined state of the memory device.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Kun Lee, Jea-Young Kwon, Hwan Kim, Song Ho Yoon, Sil Wan Chang
  • Patent number: 11644992
    Abstract: A storage system performing data deduplication includes a storage device configured to store data received from a host, and a controller configured to receive the data and an index associated with the data received from the host. The controller includes a memory configured to store mapping information and a reference count, the mapping information associating the index received from the host with a physical address of the storage system, the reference count associated with the index received from the host. The controller determines whether the data received from the host corresponds to a duplicate of data previously stored in the storage device by reading, from the memory, the mapping information and the reference count, the reading based on the index received from the host. The controller performs a deduplication process by updating the reference count if the data received from the host corresponds to the duplicate of data previously stored.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: May 9, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-kug Cho, Byoung-young Ahn, Eun-jin Yun, Yang-seok Ki, Sil-wan Chang, Seok-chan Lee
  • Patent number: 11625297
    Abstract: A storage device is provided. The storage device includes a memory device including a memory cell array configured to store metadata and main data and a storage controller configured to access the memory device and control the memory device, wherein the storage controller is configured to read data from the memory device at a speed adaptively varying to a first read speed or a second read speed according to a state of the memory device, the second read speed being faster than the first read speed.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: April 11, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jea-Young Kwon, Young-Jin Park, Jae-Kun Lee, Song Ho Yoon, Sil Wan Chang
  • Patent number: 11567685
    Abstract: A storage device may include, at least one memory device including at least a first single-level cell (SLC) region, a second SLC region, and at least one multi-level cell (MLC) region, the first SLC region having a higher data read speed than the second SLC region, and the second SLC region having a higher data read speed than the at least one MLC region, and a storage controller configured to control the migration of data among the first SLC region, the second SLC region, and the at least one MLC region.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: January 31, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwan Kim, Jea-Young Kwon, Jae-Kun Lee, Song Ho Yoon, Sil Wan Chang
  • Publication number: 20220206893
    Abstract: A storage system may include a memory device including a first region including a single-level cell and a second region different from the first region, and a storage controller configured to read data from the first region at a first gear level of a plurality of gear levels, determine an error level of the read data and a state of the memory device, and change the first gear level to a second gear level of the plurality of gear levels based on the determined error level of the data and the determined state of the memory device.
    Type: Application
    Filed: September 3, 2021
    Publication date: June 30, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Kun LEE, Jea-Young KWON, Hwan KIM, Song Ho YOON, Sil Wan CHANG
  • Publication number: 20220164123
    Abstract: A storage device may include, at least one memory device including at least a first single-level cell (SLC) region, a second SLC region, and at least one multi-level cell (MLC) region, the first SLC region having a higher data read speed than the second SLC region, and the second SLC region having a higher data read speed than the at least one MLC region, and a storage controller configured to control the migration of data among the first SLC region, the second SLC region, and the at least one MLC region.
    Type: Application
    Filed: July 16, 2021
    Publication date: May 26, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hwan KIM, Jea-Young KWON, Jae-Kun LEE, Song Ho YOON, Sil Wan CHANG
  • Publication number: 20220066872
    Abstract: A storage device is provided. The storage device includes a memory device including a memory cell array configured to store metadata and main data and a storage controller configured to access the memory device and control the memory device, wherein the storage controller is configured to read data from the memory device at a speed adaptively varying to a first read speed or a second read speed according to a state of the memory device, the second read speed being faster than the first read speed.
    Type: Application
    Filed: June 21, 2021
    Publication date: March 3, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jea-Young KWON, Young-Jin PARK, Jae-Kun LEE, Song Ho YOON, Sil Wan CHANG
  • Patent number: 11182078
    Abstract: A data storage device and a method of operating the same are provided. The data storage device includes a first non-volatile memory device, a second non-volatile memory device, and a management module. The management module receives a multi-access command including first and second physical addresses which are different from each other from a host, generates and sends a first access command including the first physical address to the first non-volatile memory device, and generates and sends a second access command including the second physical address to the second non-volatile memory device. The data storage device performs the first and second access commands on the first and second physical addresses, respectively.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: November 23, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun Jin Yun, Sil Wan Chang
  • Patent number: 10824564
    Abstract: An operation method of a memory controller which is configured to control a nonvolatile memory device includes receiving a command from the outside, calculating a delay time based on a currently available write buffer, a previously available write buffer, and a reference value, and processing the command based on the delay time.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: November 3, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yu-hun Jun, Sil Wan Chang, Heechul Chae, Seontaek Kim, In Hwan Doh
  • Patent number: 10740244
    Abstract: A memory system includes a first and a second flash domain, a domain distributor, and a first redirector. The first and second flash domains includes first and second spare memory dies, respectively. The domain distributor is configured to generate a first logical address corresponding to first data and to generate a second logical address corresponding to second data. The first redirector is configured to receive the first data and the second data from the domain distributor and to respectively provide the first data and the second data to the first flash domain and the second flash domain. The first redirector is configured to provide a part of the second data corresponding to a first fail memory die to the first flash domain, if the second flash domain include the first fail memory die, such that the first redirector replaces the first fail memory die with the first spare memory die.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: August 11, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sil-wan Chang
  • Publication number: 20200050363
    Abstract: A data storage device and a method of operating the same are provided. The data storage device includes a first non-volatile memory device, a second non-volatile memory device, and a management module. The management module receives a multi-access command including first and second physical addresses which are different from each other from a host, generates and sends a first access command including the first physical address to the first non-volatile memory device, and generates and sends a second access command including the second physical address to the second non-volatile memory device. The data storage device performs the first and second access commands on the first and second physical addresses, respectively.
    Type: Application
    Filed: October 17, 2019
    Publication date: February 13, 2020
    Inventors: Eun Jin YUN, Sil Wan CHANG
  • Patent number: 10481799
    Abstract: A data storage device and a method of operating the same are provided. The data storage device includes a first non-volatile memory device, a second non-volatile memory device, and a management module. The management module receives, from a host, an external multi-access command including first and second physical addresses which are different from each other, generates and sends a first access command including the first physical address to the first non-volatile memory device, and generates and sends a second access command including the second physical address to the second non-volatile memory device. The data management module performs operations on the first and second non-volatile memory devices based on the first and second access commands and the first and second physical addresses, respectively. The data storage device may be a solid state drive (SSD) including NAND flash memory, and the multi-access command may be a multi-write, multi-read, or multi-erase command.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: November 19, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun Jin Yun, Sil Wan Chang
  • Patent number: 10360156
    Abstract: A method of operating a data storage device in which a nonvolatile memory is included and a mapping table defining a mapping relation between a physical address and a logical address of the nonvolatile memory is stored in a host memory buffer of a host memory includes requesting a host for an asynchronous event based on information about a map miss that the mapping relation about the logical address received from the host is not included in the mapping table, receiving information about the host memory buffer adjusted by the host based on the asynchronous event, and updating the mapping table to the adjusted host memory buffer with reference to the information about the host memory buffer. A method of operating a data storage device according to example embodiments of the inventive concept can reduce the number of map misses or improve reliability of a nonvolatile memory.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: July 23, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Jin Yun, Sil Wan Chang
  • Publication number: 20190087332
    Abstract: An operation method of a memory controller which is configured to control a nonvolatile memory device includes receiving a command from the outside, calculating a delay time based on a currently available write buffer, a previously available write buffer, and a reference value, and processing the command based on the delay time.
    Type: Application
    Filed: June 13, 2018
    Publication date: March 21, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yu-hun JUN, SIL WAN CHANG, Heechul CHAE, SEONTAEK KIM, In Hwan DOH
  • Patent number: 10114555
    Abstract: A semiconductor device includes a memory cell array including a first memory region and a second memory region; a plurality of register sets for storing a plurality of parameter sets; and a control logic circuit configured to, activate a first register set among the plurality of register sets in response to a selection signal, and perform an access operation on the first memory region using a parameter set stored in an activated register set from among the plurality of register sets.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: October 30, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sil Wan Chang, Byung Gook Kim, Jae Young Kwon, Jong Youl Lee
  • Patent number: 10061521
    Abstract: An operation method of a storage device, which is connected to a host through an interface sharing a memory buffer of the host, includes receiving an access command from the host, anticipating data that is expected to be requested by the host with reference to the access command, reading out the anticipated data from a nonvolatile memory device and loading the read data to a first area of the memory buffer, and in a case of being requested to load the anticipated data into a second area of the memory buffer by the host, moving the anticipated data from the first area to the second area.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: August 28, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Sik Yun, Sil Wan Chang, Jaesub Kim, Sangyoon Oh
  • Publication number: 20180150401
    Abstract: A memory system includes a first and a second flash domain, a domain distributor, and a first redirector. The first and second flash domains includes first and second spare memory dies, respectively. The domain distributor is configured to generate a first logical address corresponding to first data and to generate a second logical address corresponding to second data. The first redirector is configured to receive the first data and the second data from the domain distributor and to respectively provide the first data and the second data to the first flash domain and the second flash domain. The first redirector is configured to provide a part of the second data corresponding to a first fail memory die to the first flash domain, if the second flash domain include the first fail memory die, such that the first redirector replaces the first fail memory die with the first spare memory die.
    Type: Application
    Filed: September 21, 2017
    Publication date: May 31, 2018
    Inventor: Sil-wan CHANG
  • Patent number: 9984757
    Abstract: An operating method of a memory controller, configured to control a non-volatile memory device that performs a refresh read operation, detects a power on state or power off state of the non-volatile memory device and issues a refresh read command. The non-volatile memory device that receives the refresh read command is controlled to perform, one time, the refresh read operation including a read operation on one of a plurality of word lines with respect to each of the plurality of memory blocks.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: May 29, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joon-Ho Lee, Sil-Wan Chang, Hyun-Jin Choi, Dong-Hoon Ham
  • Publication number: 20180143780
    Abstract: A storage system performing data deduplication includes a storage device configured to store data received from a host, and a controller configured to receive the data and an index associated with the data received from the host. The controller includes a memory configured to store mapping information and a reference count, the mapping information associating the index received from the host with a physical address of the storage system, the reference count associated with the index received from the host. The controller determines whether the data received from the host corresponds to a duplicate of data previously stored in the storage device by reading, from the memory, the mapping information and the reference count, the reading based on the index received from the host. The controller performs a deduplication process by updating the reference count if the data received from the host corresponds to the duplicate of data previously stored.
    Type: Application
    Filed: November 16, 2017
    Publication date: May 24, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sung-kug CHO, Byoung-young AHN, Eun-jin YUN, Yang-seok KI, Sil-wan CHANG, Seok-chan LEE
  • Publication number: 20180039578
    Abstract: A method of operating a data storage device in which a nonvolatile memory is included and a mapping table defining a mapping relation between a physical address and a logical address of the nonvolatile memory is stored in a host memory buffer of a host memory includes requesting a host for an asynchronous event based on information about a map miss that the mapping relation about the logical address received from the host is not included in the mapping table, receiving information about the host memory buffer adjusted by the host based on the asynchronous event, and updating the mapping table to the adjusted host memory buffer with reference to the information about the host memory buffer. A method of operating a data storage device according to example embodiments of the inventive concept can reduce the number of map misses or improve reliability of a nonvolatile memory.
    Type: Application
    Filed: July 18, 2017
    Publication date: February 8, 2018
    Inventors: EUN-JIN YUN, SIL WAN CHANG