Patents by Inventor Siladitya Dey

Siladitya Dey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240356507
    Abstract: A high input impedance switched capacitor amplifier is disclosed. The switched capacitor amplifier includes at least a first buffer circuit configured to charge a first plurality of capacitors during a first time period. A switch circuit is configured to, during a second time period, cause a modification of an amount of charge stored on one of the first plurality of capacitors by coupling an input signal directly to the one of first plurality of capacitors. An amplifier circuit is configured to, based on a sampling voltage present on one of the first plurality of capacitors, generate an output signal.
    Type: Application
    Filed: April 18, 2023
    Publication date: October 24, 2024
    Inventors: Saikrishna Ganta, Sudharsan Kanagaraj, Siladitya Dey, Man-Chia Chen, Paritosh Bhoraskar, Srinivas Bangalore Seshadri, Tao Wang, Si Chen
  • Patent number: 10069483
    Abstract: A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: September 4, 2018
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Siladitya Dey, Daniel J. Allen, John L. Melanson, Aniruddha Satoskar