Patents by Inventor Silergy Semiconductor Technology (Hangzhou)
Silergy Semiconductor Technology (Hangzhou) has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130328496Abstract: An LED driver described herein can determine whether it is operating in z soft-start process by comparing a first threshold value and a soft-start reference value. In the soft-start process, the inductor current and the LED driving current can be soft-started periodically to effectively avoid current overshoot. In addition, the end of the soft-tart operation can be controlled based on a comparison result of the first threshold value and the reference value of the soft-start, and without any external settings. Thus, the end of soft-start operation can automatically be determined with strong controllability.Type: ApplicationFiled: May 10, 2013Publication date: December 12, 2013Applicant: Silergy Semiconductor Technology(Hangzhou) LTDInventor: Silergy Semiconductor Technology (Hangzhou) LTD
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Publication number: 20130313989Abstract: The present invention relates to a high efficiency, high power factor LED driver for driving an LED device. In one embodiment, an LED driver can include: an LED current detection circuit coupled to the LED device, and configured to generate a feedback signal that represents an error between a driving current and an expected driving current of the LED device; a power stage circuit, where a first power switch terminal is coupled to a first input voltage, and a second power switch terminal is coupled to ground; and a control circuit configured to generate a control signal according to the feedback signal and a drain-source voltage of the power switch, where the control signal, in each switch period, turns on the power switch when the drain-source voltage reaches a low level, and turns off the power switch after a fixed time interval based on the feedback signal.Type: ApplicationFiled: April 3, 2013Publication date: November 28, 2013Applicant: Silergy Semiconductor Technology (Hangzhou) LTDInventor: Silergy Semiconductor Technology (Hangzhou) LTD
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Publication number: 20130250629Abstract: The present invention discloses CVCC circuits and methods with improved load regulation for an SMPS. In one embodiment, the CVCC can include: a voltage feedback circuit to generate an output voltage feedback signal; a current feedback circuit to generate an output current feedback signal; a control signal generating circuit that receives the output voltage feedback signal and the output current feedback signal, and generates a constant voltage/constant current control signal; a first enable signal generating circuit that compares a first reference voltage and the constant voltage/constant current control signal to generate a first enable signal; and a PWM controller that generates a PWM control signal based on the constant voltage/constant current control signal to control a main switch of the flyback SMPS.Type: ApplicationFiled: February 28, 2013Publication date: September 26, 2013Applicant: Silergy Semiconductor Technology (Hangzhou) LTDInventor: Silergy Semiconductor Technology (Hangzhou) LTD
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Publication number: 20130241461Abstract: Disclosed herein are sinusoidal modulation control methods and circuits for PMSM. In one embodiment, a method can include: detecting rotor position information of the PMSM to obtain a rotor position signal and a rotor rotating speed measured value; comparing the rotating speed measured value against a reference rotating speed value to generate an error signal, and generating a first regulating voltage signal based on the error signal using a PI regulator; receiving the rotor position signal and the first regulating voltage signal, and generating a full-wave U-shaped modulation wave by using the rotor position signal as a time reference; generating a second U-shaped modulation wave by multiplying the full-wave U-shaped modulation wave with the first regulating voltage signal; comparing the second U-shaped modulation wave against a triangular wave to generate a PWM control signal that controls a switch of an inverter to regulate a current of the PMSM.Type: ApplicationFiled: February 25, 2013Publication date: September 19, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (Hangzhou) LTDInventor: SILERGY SEMICONDUCTOR TECHNOLOGY (Hangzhou) LTD
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Publication number: 20130234612Abstract: The present disclosure relates to blend dimming circuits and methods for driving light loads. In one embodiment, a method can include: converting an external sinusoidal AC power supply to a phase-missing DC voltage signal; detecting a conduction angle of the phase-missing DC voltage signal to generate a first control signal representing the conduction angle; generating an analog dimming signal based on the first control signal; generating, by a PWM dimming circuit, a PWM dimming signal based on the analog dimming signal and a light load feedback signal; regulating light load brightness by PWM dimming when the conduction angle is greater than a threshold angle; regulating the light load brightness by PWM and analog dimming when the conduction angle is less than the threshold angle; and enabling a power stage circuit when the first control signal is active to regulate the brightness of the light load.Type: ApplicationFiled: February 7, 2013Publication date: September 12, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD
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Publication number: 20130223108Abstract: The present invention relates to a constant voltage constant current (CVCC) controller, and associated control methods. In one embodiment, a CVCC controller for a flyback converter can include: (i) a current controller configured to generate an error signal by comparing an output current feedback signal against a reference current; (ii) a voltage controller configured to receive an output voltage feedback signal and a reference voltage, and to generate a control signal; (iii) a selector configured to control the flyback converter to operate in a first or a second operation mode based on the control signal, and to further generate a constant voltage or a constant current control signal based on the error signal; and (iv) a pulse-width modulation (PWM) controller configured to generate a PWM control signal to control a main switch, and to maintain the output voltage and/or current of the flyback converter as substantially constant.Type: ApplicationFiled: January 25, 2013Publication date: August 29, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD
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Publication number: 20130223119Abstract: The present invention pertains to a boost power factor correction (PFC) controller. In one embodiment, a boost PFC controller for an AC/DC converter can include: an off signal generator that compares an inductor current sample signal against a first control signal, where the inductor current sample signal increases during an on time of a power switch of the AC/DC converter, and the off signal generator generates an off signal when the inductor current sample signal reaches the first control signal level; and an on signal generator that compares a second control signal against a third control signal, where the second control signal increases during the off time of the power switch, and the on signal generator generates an on signal when the second control signal reaches the third control signal level.Type: ApplicationFiled: February 6, 2013Publication date: August 29, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD
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Publication number: 20130207560Abstract: The present invention relates to a multi-output current-balancing circuit, which in one embodiment can include: (i) a transformer having a primary winding and a plurality of secondary windings, where the primary winding receives an AC input current; (ii) a plurality of first and second rectifier circuits and a plurality of first current balancing components, where each of the first and second rectifier circuits and the first current balancing components is coupled to a corresponding secondary winding, where each the first current balancing component is configured for current balancing between each of the first and second rectifier circuits of the corresponding secondary winding; and (iii) at least one second current balancing component, where each second current balancing component is coupled to a pair of the second rectifier circuits that correspond to different secondary windings, where the second current balancing components are configured for current balancing between different the secondary windings.Type: ApplicationFiled: January 16, 2013Publication date: August 15, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: SILERGY SEMICONDUCTOR TECHNOLOGY (Hangzhou) LTD
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Publication number: 20130181620Abstract: The present invention relates to a multi-output self-balancing power circuit. In one embodiment, a multi-output self-balancing power circuit can include: a transformer formed by a primary winding and n (e.g., greater than 2) series connected secondary windings; n output circuits corresponding to the n secondary windings, where each of the n output circuits can include a rectifier diode and a filter capacitor, and a load can be parallel coupled with the filter capacitor; n output circuits series coupled between a first output terminal of a first secondary winding and a second output terminal of an nth secondary winding; and (n?1) current balancing capacitors coupled between a common junction of n secondary windings and a common junction of n output circuits.Type: ApplicationFiled: January 9, 2013Publication date: July 18, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: Silergy Semiconductor Technology (Hangzhou) LTD
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Publication number: 20130181626Abstract: The present invention relates to a high efficiency LED driver, and driving methods thereof. In one embodiment, a high efficiency LED driving method can include: (i) receiving an AC input voltage to obtain an absolute value thereof; (ii) receiving a DC bus voltage, and driving the LED device through a power switch; (iii) generating a first reference voltage according to a driving current and an expected driving current; (iv) comparing the absolute value against a sum of a driving voltage and the first reference voltage; (v) when the absolute value is greater than the sum of the driving voltage and the first reference voltage, turning off the power switch; and (vi) when the absolute value is greater than the driving voltage but less than the sum of the driving voltage and the first reference voltage, turning on the power switch to generate an output current.Type: ApplicationFiled: January 9, 2013Publication date: July 18, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: Silergy Semiconductor Technology (Hangzhou) LTD
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Publication number: 20130175936Abstract: The present invention relates to a high efficiency LED driver and driving method thereof. In one embodiment, a high efficiency LED driving method configured for a LED device can include: (i) receiving a DC bus voltage and generating a driving voltage for the LED device through a power switch; (ii) comparing the DC bus voltage against a sum of the driving voltage and a first reference voltage; (iii) where when the DC bus voltage is greater than the sum of the driving voltage and the first reference voltage, generating a first output current; (iv) where when the DC bus voltage is greater than the driving voltage and less than the sum of the driving voltage and the first reference voltage, generating a second output current; and (v) matching an average current of the first output current and the second output current with a corresponding driving current.Type: ApplicationFiled: December 21, 2012Publication date: July 11, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: Silergy Semiconductor Technology (Hangzhou) LTD
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Publication number: 20130163300Abstract: The present invention relates to a power factor correction (PFC) controller. In one embodiment, a boost PFC controller configured in an AC/DC converter can include: (i) a conductive signal generator configured to receive a first sampling signal, and to generate a conductive signal according to the first sampling signal and a first control signal; (ii) a shutdown signal generator configured to compare a second control signal against a third control signal, and to generate a shutdown signal when the second control signal reaches a level of the third control signal; and (iii) a logic controller coupled to the conductive signal generator and the shutdown signal generator to control a switching state of a power switch in AC/DC converter.Type: ApplicationFiled: December 13, 2012Publication date: June 27, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: SILERGY SEMICONDUCTOR TECHNOLOGY (Hangzhou) Ltd.
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Publication number: 20130154710Abstract: The present invention relates to a cascode circuit using MOS transistors. In one embodiment, an adaptive cascode circuit can include: (i) a main MOS transistor; (ii) n adaptive MOS transistors coupled in series to the drain of the main MOS transistor, where n can be an integer greater than one; (iii) a shutdown clamping circuit connected to the gates of the n adaptive MOS transistors, where the shutdown clamping circuit may have (n+1) shutdown clamping voltages no larger than rated gate-drain voltages of the main MOS transistor and n adaptive MOS transistors; and (iv) n conduction clamping circuits coupled correspondingly to the gates of the adaptive MOS transistors, where the n conduction clamping circuits may have n conduction clamping voltages no larger than the conduction threshold voltages of the adaptive MOS transistors.Type: ApplicationFiled: December 11, 2012Publication date: June 20, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: SILERGY SEMICONDUCTOR TECHNOLOGY (Hangzhou) LTD
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Publication number: 20130134567Abstract: The present invention relates to the field of semiconductor package structures, and more specifically to a lead frame and a semiconductor package structure thereof. In one embodiment, a lead frame can include a plurality of parallel-arrayed lead fingers with a plurality of grooves situated on surfaces of the lead fingers, where the depths of the grooves can be smaller than the thickness of the lead fingers. In one embodiment, a flip chip semiconductor package structure can include a chip, a group of bumps, and the above-described lead frame. The first surfaces of the bumps can be coupled to the front surface of the chip, and the second surfaces of the bumps can be coupled to the upper surface of the lead frame.Type: ApplicationFiled: November 12, 2012Publication date: May 30, 2013Applicant: Silergy Semiconductor Technology (Hangzhou) LTDInventor: Silergy Semiconductor Technology (Hangzhou) L
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Publication number: 20130134568Abstract: The present invention relates to the field of semiconductor chip packages, and more specifically to a lead frame and flip chip package device thereof. In one embodiment, a lead frame for electrically connecting a chip to outside leads, can include a plurality of lead fingers, where each of the plurality of lead fingers comprises a plurality of outburst regions extending from an edge thereof. In one embodiment, a flip chip package device can include: a chip and a plurality of solder bumps, where one surface of the chip is connected to a first surface of each of the plurality of solder bumps; and the lead frame, where second surfaces of each of the plurality solder bumps are connected with corresponding outburst regions of the lead frame to connect the chip to the lead frame through the solder bumps.Type: ApplicationFiled: November 9, 2012Publication date: May 30, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: Silergy Semiconductor Technology (Hangzhou) LT
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Publication number: 20130127496Abstract: Methods and circuits related to a driving circuit with zero current shutdown are disclosed. In one embodiment, a driving circuit with zero current shutdown can include: a linear regulating circuit that receives an input voltage source, and outputs an output voltage; a start-up circuit having a threshold voltage, the start-up circuit receiving an external enable signal; a first power switch receiving both the output voltage of the linear regulating circuit and the external enable signal, and that generates an internal enable signal, the internal enable signal being configured to drive a logic circuit; when the external enable signal is lower than a threshold voltage, the driving circuit is not effective; when the external enable signal is higher than the threshold voltage, the start-up circuit outputs a first current; and where the output voltage at the first output terminal is generated by the linear regulating circuit based on the first current.Type: ApplicationFiled: January 23, 2013Publication date: May 23, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: Silergy Semiconductor Technology (Hangzhou) LTD
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Publication number: 20130105938Abstract: The present invention relates to device matching in an integrated circuit. In one embodiment, an integrated circuit of matched devices can include: N main-devices to be matched by 4×K sub-devices configured to form K device arrays, where each of the device arrays includes four sub-device groups arrayed symmetrically around a vertical axis and a horizontal axis, where each of the sub-device groups includes N sub-devices arrayed with equal distance along a direction of the vertical axis, where K and N are integers, and N is larger than two; metal lead wires arrayed in parallel and with equal distance, and configured to connect the main-devices; a common connecting wire configured to connect common nodes of the sub-devices together; and where four sub-devices arrayed in the four sub-device groups, and other sub-devices arrayed in other sub-device groups, are coupled to form 4×K sub-devices to match the main-devices.Type: ApplicationFiled: October 2, 2012Publication date: May 2, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: Silergy Semiconductor Technology (Hangzhou)
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Publication number: 20130107592Abstract: The present invention relates to reference voltage regulating methods and circuits for a constant current driver. In one embodiment, a method can include: setting a reference voltage circuit matching with a current output channel of a constant current source; setting a first resistor of the reference voltage circuit to follow an ideal equivalent resistor of the current output channel, and maintaining a proportion of the first resistor and the ideal equivalent resistor to be no less than a predetermined value M; setting a first current of the reference voltage circuit to follow an ideal output current of the current output channel, and maintaining a proportion of the first current and the ideal output current to be no less than 1/M; and setting a product of the first current and the first resistor to be a reference voltage of the reference voltage circuit.Type: ApplicationFiled: October 18, 2012Publication date: May 2, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: Silergy Semiconductor Technology (Hangzhou)
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Publication number: 20130093406Abstract: Methods and circuits related to power regulation are disclosed. In one embodiment, a power regulator for converting an input electrical signal to an output electrical signal to supply power to a load, can include: (i) a power stage having switching devices and a filter; (ii) a regulation signal generator for the switching devices that includes a feedback circuit and a PWM, the feedback circuit receiving an output signal from the power stage, the PWM receiving an output from the feedback circuit, and generating a PWM control signal; (iii) a constant time generator receiving the PWM control signal and generating a constant time signal based on the PWM control signal duty cycle; and (iv) a logic/driving circuit receiving the PWM control signal and the constant time signal, and controlling operation of the switching devices to modulate the output signal from the power stage, and maintaining a pseudo constant operation frequency.Type: ApplicationFiled: December 10, 2012Publication date: April 18, 2013Applicant: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventor: Silergy Semiconductor Technology (Hangzhou) Lt