Patents by Inventor Silke H. Christiansen

Silke H. Christiansen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6855649
    Abstract: A method to obtain thin (less than 300 nm) strain-relaxed Si1-xGex buffer layers on Si or silicon-on-insulator (SOI) substrates. These buffer layers have a homogeneous distribution of misfit dislocations that relieve the strain, remarkably smooth surfaces, and a low threading dislocation (TD) density, i.e. less than 106 cm2. The approach begins with the growth of a pseudomorphic or nearly pseudomorphic Si1-xGex layer, i.e., a layer that is free of misfit dislocations, which is then implanted with He or other light elements and subsequently annealed to achieve the substantial strain relaxation. The very effective strain relaxation mechanism operating with this method is dislocation nucleation at He-induced platelets (not bubbles) that lie below the Si/Si1-xGex interface, parallel to the Si(001) surface.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: February 15, 2005
    Assignee: International Business Machines Corporation
    Inventors: Silke H. Christiansen, Jack O. Chu, Alfred Grill, Patricia M. Mooney
  • Patent number: 6833332
    Abstract: A method of fabricating relaxed SiGe buffer layers with low threading dislocation densities on silicon-on-insulator (SOI) substrates is provided. The relaxed SiGe buffer layers are fabricated by the epitaxial deposition of a defect-free Stranski-Krastanov Ge or SiGe islands on a surface of the SOI substrate; the capping and planarizing of the islands with a Si or Si-rich SiGe layer, and the annealing of the structure at elevated temperatures until intermixing and thereby formation of a relaxed SiGe layer on the insulating layer (i.e., buried oxide layer) of the initial SOI wafer is achieved. The present invention is also directed to semiconductor structures, devices and integrated circuits which include at least the relaxed SiGe buffer layer mentioned above.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: December 21, 2004
    Assignee: International Business Machines Corporation
    Inventors: Silke H. Christiansen, Alfred Grill, Patricia M. Mooney
  • Patent number: 6709903
    Abstract: A method to obtain thin (<300 nm) strain-relaxed Si1−xGex buffer layers on Si or silicon-on-insulator (SOI) substrates. These buffer layers have a homogeneous distribution of misfit dislocations that relieve the strain, remarkably smooth surfaces, and a low threading dislocation (TD) density, i.e. <106 cm−2. The approach begins with the growth of a pseudomorphic Si1−xGex layer, i.e., a layer that is free of misfit dislocations, which is then implanted with He or other light elements and subsequently annealed to achieve the substantial strain relaxation. The very effective strain relaxation mechanism operating with this method is dislocation nucleation at He-induced platelets (not bubbles) that lie below the Si/Si1−xGex interface, parallel to the Si(001) surface.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: March 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Silke H. Christiansen, Jack O. Chu, Alfred Grill, Patricia M. Mooney
  • Publication number: 20030218189
    Abstract: A method to obtain thin (less than 300 nm) strain-relaxed Si1−xGex buffer layers on Si or silicon-on-insulator (SOI) substrates. These buffer layers have a homogeneous distribution of misfit dislocations that relieve the strain, remarkably smooth surfaces, and a low threading dislocation (TD) density, i.e. less than 106 cm2. The approach begins with the growth of a pseudomorphic or nearly pseudomorphic Si1−xGex layer, i.e., a layer that is free of misfit dislocations, which is then implanted with He or other light elements and subsequently annealed to achieve the substantial strain relaxation. The very effective strain relaxation mechanism operating with this method is dislocation nucleation at He-induced platelets (not bubbles) that lie below the Si/Si1−xGex interface, parallel to the Si(001) surface.
    Type: Application
    Filed: November 19, 2002
    Publication date: November 27, 2003
    Applicant: International Business Machines Corporation
    Inventors: Silke H. Christiansen, Jack O. Chu, Alfred Grill, Patricia M. Mooney
  • Publication number: 20030201468
    Abstract: A method to obtain thin (<300 nm) strain-relaxed Si1-xGex buffer layers on Si or silicon-on-insulator (SOI) substrates. These buffer layers have a homogeneous distribution of misfit dislocations that relieve the strain, remarkably smooth surfaces, and a low threading dislocation (TD) density, i.e. <106 cm−2. The approach begins with the growth of a pseudomorphic Si1-xGex layer, i.e., a layer that is free of misfit dislocations, which is then implanted with He or other light elements and subsequently annealed to achieve the substantial strain relaxation. The very effective strain relaxation mechanism operating with this method is dislocation nucleation at He-induced platelets (not bubbles) that lie below the Si/Si1-xGex interface, parallel to the Si(001) surface.
    Type: Application
    Filed: April 30, 2003
    Publication date: October 30, 2003
    Inventors: Silke H. Christiansen, Jack O. Chu, Alfred Grill, Patricia M. Mooney
  • Patent number: 6593625
    Abstract: A method to obtain thin (<300 nm) strain-relaxed Si1-xGex buffer layers on Si or silicon-on-insulator (SOI) substrates. These buffer layers have a homogeneous distribution of misfit dislocations that relieve the strain, remarkably smooth surfaces, and a low threading dislocation (TD) density, i.e. <106 cm−2. The approach begins with the growth of a pseudomorphic Si1-x Gex layer, i.e., a layer that is free of misfit dislocations, which is then implanted with He or other light elements and subsequently annealed to achieve the substantial strain relaxation. The very effective strain relaxation mechanism operating with this method is dislocation nucleation at He-induced platelets (not bubbles) that lie below the Si/Si1-xGex interface, parallel to the Si(001) surface.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: July 15, 2003
    Assignee: International Business Machines Corporation
    Inventors: Silke H. Christiansen, Jack O. Chu, Alfred Grill, Patricia M. Mooney
  • Publication number: 20030127646
    Abstract: A method of fabricating relaxed SiGe buffer layers with low threading dislocation densities on silicon-on-insulator (SOI) substrates is provided. The relaxed SiGe buffer layers are fabricated by the epitaxial deposition of a defect-free Stranski-Krastanov Ge or SiGe islands on a surface of the SOI substrate; the capping and planarizing of the islands with a Si or Si-rich SiGe layer, and the annealing of the structure at elevated temperatures until intermixing and thereby formation of a relaxed SiGe layer on the insulating layer (i.e., buried oxide layer) of the initial SOI wafer is achieved. The present invention is also directed to semiconductor structures, devices and integrated circuits which include at least the relaxed SiGe buffer layer mentioned above.
    Type: Application
    Filed: December 18, 2002
    Publication date: July 10, 2003
    Applicant: International Business Machines Corporation
    Inventors: Silke H. Christiansen, Alfred Grill, Patricia M. Mooney
  • Patent number: 6515335
    Abstract: A method of fabricating relaxed SiGe buffer layers with low threading dislocation densities on silicon-on-insulator (SOI) substrates is provided. The relaxed SiGe buffer layers are fabricated by the epitaxial deposition of a defect-free Stranski-Krastanov Ge or SiGe islands on a surface of the SOI substrate; the capping and planarizing of the islands with a Si or Si-rich SiGe layer, and the annealing of the structure at elevated temperatures until intermixing and thereby formation of a relaxed SiGe layer on the insulating layer (i.e., buried oxide layer) of the initial SOI wafer is achieved. The present invention is also directed to semiconductor structures, devices and integrated circuits which include at least the relaxed SiGe buffer layer mentioned above.
    Type: Grant
    Filed: January 4, 2002
    Date of Patent: February 4, 2003
    Assignee: International Business Machines Corporation
    Inventors: Silke H. Christiansen, Alfred Grill, Patricia M. Mooney
  • Publication number: 20020185686
    Abstract: A method to obtain thin (<300 nm) strain-relaxed Si1-xGex buffer layers on Si or silicon-on-insulator (SOI) substrates. These buffer layers have a homogeneous distribution of misfit dislocations that relieve the strain, remarkably smooth surfaces, and a low threading dislocation (TD) density, i.e. <106 cm−2. The approach begins with the growth of a pseudomorphic Si1-x Gex layer, i.e., a layer that is free of misfit dislocations, which is then implanted with He or other light elements and subsequently annealed to achieve the substantial strain relaxation. The very effective strain relaxation mechanism operating with this method is dislocation nucleation at He-induced platelets (not bubbles) that lie below the Si/Si1-xGex interface, parallel to the Si(001) surface.
    Type: Application
    Filed: April 3, 2002
    Publication date: December 12, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Silke H. Christiansen, Jack O. Chu, Alfred Grill, Patricia M. Mooney