Patents by Inventor Silvano Gai

Silvano Gai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050192967
    Abstract: A method and apparatus to improve the performance of a SCSI write over a high latency network. The apparatus includes a first Switch close to the initiator in a first SAN and a second Switch close to the target in a second SAN. In various embodiments, the two Switches are border switches connecting their respective SANs to a relatively high latency network between the two SANs. In addition, the initiator can be either directly connected or indirectly connected to the first Switch in the first SAN. The target can also be either directly or indirectly connected to the second Switch in the second SAN. During operation, the method includes the first Switch sending Transfer Ready (Xfr_rdy) frame(s) based on buffer availability to the initiating Host in response to a SCSI Write command from the Host directed to the target. The first and second Switches then coordinate with one another by sending Transfer Ready commands to each other independent of the target's knowledge.
    Type: Application
    Filed: March 1, 2004
    Publication date: September 1, 2005
    Applicant: Cisco Technology, Inc.
    Inventors: Murali Basavaiah, Satish Ambati, Magesh Iyengar, Thomas Edsall, Dinesh Dutt, Silvano Gai, Varagur Chandrasekaran
  • Publication number: 20050190758
    Abstract: Methods and devices are provided for implementing security groups in an enterprise network. The security groups include first network nodes that are subject to rules governing communications between the first network nodes and second network nodes. An indicator, referred to as a security group tag (SGT), identifies members of a security group. In some embodiments, the SGT is provided in a field of a data packet reserved for layer 3 information or a field reserved for higher layers. However, in other embodiments, the SGT is provided in a field reserved for layer 1 or layer 2. In some embodiments, the SGT is not provided in a field used by interswitch links or other network fabric devices for the purpose of making forwarding decisions.
    Type: Application
    Filed: March 1, 2004
    Publication date: September 1, 2005
    Applicant: Cisco Technology, Inc.
    Inventors: Silvano Gai, Thomas Edsall
  • Publication number: 20050165966
    Abstract: A method for searching network messages for pre-defined regular expressions is disclosed. A plurality of pre-defined regular expressions are stored in a content-addressable memory (CAM). A network message or selected portion thereof is inputted to the CAM for comparison with all of the regular expressions stored therein, the comparison with all CAM entries being done at the same time. An output is returned from the CAM. In response to the output from the CAM, identifying an action to be applied to the given network message or portion thereof that corresponds to a CAM entry matching the inputted network message or selected portion thereof.
    Type: Application
    Filed: March 21, 2005
    Publication date: July 28, 2005
    Inventors: Silvano Gai, Thomas Edsall
  • Publication number: 20050141419
    Abstract: Methods and devices are provided for implementing flow control coordination in a gateway between a TCP/IP network and a second network. The second network may be any type of network, including another TCP/IP network. In some implementations, the throughput of the TCP/IP network is controlled by modifying the round trip time observed by a TCP connection. In other implementations, the throughput of the TCP/IP network is controlled by modifying the size of the TCP window.
    Type: Application
    Filed: June 17, 2003
    Publication date: June 30, 2005
    Applicant: Cisco Technology, Inc. A corporation of California
    Inventors: Davide Bergamasco, Deepak Sharma, Rajesh R A, Silvano Gai, Vibin Thomas
  • Patent number: 6904014
    Abstract: A network traffic shaper includes a traffic shaper table for storing traffic specifiers, such as permissible data transmission rates, an arithmetic logic unit (ALU), and a high-speed forwarding trigger mechanism having at least one time-searchable data structure or queue and a retrieve time generator that substantially tracks, but never exceeds, a system time. As network messages are received, they are stored at a message buffer and certain message parameters, including message length and a corresponding traffic specifier, are provided to the traffic shaper. The traffic shaper determines when the message may be sent in accordance with the associated traffic specifier and stores this transmission start time along with the message's buffer location in the time-searchable queue of the forwarding trigger. The forwarding trigger continuously examines the transmission start times for previously stored messages.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: June 7, 2005
    Assignee: Cisco Technology, Inc.
    Inventors: Silvano Gai, Thomas J. Edsall
  • Publication number: 20050117522
    Abstract: A method and apparatus to improve the performance of a SCSI write over a high latency network. The apparatus includes a first Switch close to the initiator in a first SAN and a second Switch close to the target in a second SAN. In various embodiments, the two Switches are border switches connecting their respective SANs to a relatively high latency network between the two SANs. In addition, the initiator can be either directly connected or indirectly connected to the first Switch in the first SAN. The target can also be either directly or indirectly connected to the second Switch in the second SAN. During operation, the method includes the first Switch sending Transfer Ready (Xfr_rdy) frame(s) based on buffer availability to the initiating Host in response to a SCSI Write command from the Host directed to the target. The first and second Switches then coordinate with one another by sending Transfer Ready commands to each other independent of the target's knowledge.
    Type: Application
    Filed: December 1, 2003
    Publication date: June 2, 2005
    Applicant: Andiamo Systems, Inc.
    Inventors: Murali Basavaiah, Satish Ambati, Magesh Iyengar, Thomas Edsall, Dinesh Dutt, Silvano Gai, Varagur Chandrasekaran
  • Patent number: 6892237
    Abstract: A programmable pattern matching engine efficiently parses the contents of network messages for regular expressions and executes pre-defined actions or treatments on those messages that match the regular expressions. The pattern matching engine is preferably a logic circuit designed to perform its pattern matching and execution functions at high speed, e.g., at multi-gigabit per second rates. It includes, among other things, a message buffer for storing the message being evaluated, a decoder circuit for decoding and executing corresponding actions or treatments, and one or more content-addressable memories (CAMs) that are programmed to store the regular expressions used to search the message. The CAM may be associated with a second memory device, such as a random access memory (RAM), as necessary, that is programmed to contain the respective actions or treatments to be applied to messages matching the corresponding CAM entries.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: May 10, 2005
    Assignee: Cisco Technology, Inc.
    Inventors: Silvano Gai, Thomas J. Edsall
  • Patent number: 6874016
    Abstract: A system for efficiently organizing data or information into an associative memory device, such as a ternary content addressable memory (TCAM), for subsequent searching divides the TCAM is divided into a plurality of individual stages that are interconnected in a cascading fashion. The data or information that is to be stored into the TCAM for subsequent searching is initially translated into a first Boolean representation, such as a binary decision diagram (BDD), that is partitioned into a plurality of segments. Each segment defines one or more outputs, and the outputs from one segment define the inputs to the next segment. After partitioning the BDD and identifying the resulting outputs, each BDD segment along with its corresponding outputs is mapped into a particular stage of the TCAM.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: March 29, 2005
    Assignee: Cisco Technology, Inc.
    Inventors: Silvano Gai, Keith McCloghrie
  • Publication number: 20050036499
    Abstract: An Fibre Channel Switch which enables end devices in different Fabrics to communicate with one another while retaining their unique Fibre Channel Domain_IDs. The Switch is coupled to a first fabric having a first set of end devices and a second fabric having a second set of end devices. The Switch is configured to enable communication by the first set of end devices associated with the first fabric with the second set of end devices associated with the second set of end devices using the unique Domain_IDs of each of the first set and the second set of end devices. In one embodiment of the invention, the first and second fabrics are first and second Virtual Storage Array Networks (VSANs) respectively. In an alternative embodiment, the first fabric and the second fabric are separate physical fabrics.
    Type: Application
    Filed: June 26, 2003
    Publication date: February 17, 2005
    Applicant: Andiamo Systems, Inc., A Delaware corporation
    Inventors: Dinesh Dutt, Thomas Edsall, Ankur Jain, Silvano Gai, Subrata Banerjee, Davide Bergamasco, Bruno Raimondo, Rajeev Bharadwaj
  • Publication number: 20050025075
    Abstract: An Fibre Channel Switch which enables end devices in different Fabrics to communicate with one another while retaining their unique Fibre Channel Domain_IDs. The Switch is coupled to a first fabric having a first set of end devices and a second fabric having a second set of end devices. The Switch is configured to enable communication by the first set of end devices associated with the first fabric with the second set of end devices associated with the second set of end devices using the unique Domain_IDs of each of the first set and the second set of end devices. In one embodiment of the invention, the first and second fabrics are first and second Virtual Storage Array Networks (VSANs) respectively. In an alternative embodiment, the first fabric and the second fabric are separate physical fabrics.
    Type: Application
    Filed: March 1, 2004
    Publication date: February 3, 2005
    Applicant: Cisco Technology, Inc.
    Inventors: Dinesh Dutt, Silvano Gai, Bruno Raimondo, Thomas Edsall, Subrata Banerjee, Rajeev Bhardwaj, Ankur Jain, Davide Bergamasco
  • Patent number: 6831898
    Abstract: The invention replicates a packet requiring high availability and transmits it from two or more ports of a switch, for example a wiring closet Layer 2 switch. The parent packet carries a unique sequence number. The copies of the packet each carry the parent packet's unique sequence number. Each copy of the packet then travels on separate pathways through routers (Layer 3 network devices). The pathways are maintained separate by assigning high costs in a LSP routing sense to links connecting the two paths, and by assigning low costs to links along the desired paths. The two identical packets converge on the destination station. The destination station accepts the first packet with a particular sequence number, and discards any later packets with the same sequence number. In the event that a link in one path has a catastrophic failure, then the packet travelling along the other path reaches the destination station and service remains operative without interruption.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: December 14, 2004
    Assignee: Cisco Systems, Inc.
    Inventors: Thomas J. Edsall, Silvano Gai, Soei-Shin Hang
  • Publication number: 20040221087
    Abstract: Ports of a switch are assigned by a person, for example a network manager, to be for communication up the spanning tree toward the root switch (“up ports”), or down the spanning tree away from the root switch (“down ports”). This assignment is made by enabling “Uplinkguard” status for a desired up port, and by connecting the desired port to a switch which it is desired to place in the higher layer of the spanning tree. A port having Uplinkguard enabled is prevented, for example by software or firmware in its switch, from transitioning to a designated role. Uplinkguard enabling a port, by preventing the port from transitioning to the designated role, has at least two consequences: preventing the port from being selected by the STP to transmit to lower switches in the spanning tree; and, preventing the port from transmitting when a one way connectivity fault develops on that port. A port with Uplinkguard enabled may transition to root port role.
    Type: Application
    Filed: December 22, 2000
    Publication date: November 4, 2004
    Inventors: Marco Di Benedetto, Umesh Mahajan, Silvano Gai
  • Patent number: 6813250
    Abstract: A shared spanning tree protocol (SSTP) creates a plurality of spanning trees (i.e., loop-free paths) which are shared among one or more virtual local area network (VLAN) designations for data transmission within a computer network. Each shared spanning tree includes and is defined by a primary VLAN and may be associated with one or more secondary VLANs. In order to associate VLAN designation(s) with a single shared spanning tree, network devices exchange novel shared spanning tree protocol data units (SST-PDUs). Each SST-PDU corresponds to a given primary VLAN and preferably includes one or more fields which list the secondary VLAN designations associated with the given primary VLAN. The association of VLAN designations to shared spanning trees, moreover, preferably depends on which path traffic is to follow as well as the anticipated load characteristics of the various VLANs. The association of VLAN designations to shared spanning trees thus provides a degree of load balancing within the network.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: November 2, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Michael Fine, Silvano Gai, Keith McCloghrie
  • Publication number: 20040160903
    Abstract: Methods and devices are provided for implementing security groups in an enterprise network. The security groups include first network nodes that are subject to rules governing communications between the first network nodes and second network nodes. An indicator, referred to as a security group tag (SGT), identifies members of a security group. In some embodiments, the SGT is provided in a field of a data packet reserved for layer 3 information or a field reserved for higher layers. However, in other embodiments, the SGT is provided in a field reserved for layer 1 or layer 2. In some embodiments, the SGT is not provided in a field used by interswitch links or other network fabric devices for the purpose of making forwarding decisions.
    Type: Application
    Filed: February 13, 2003
    Publication date: August 19, 2004
    Applicant: Andiamo Systems, Inc.
    Inventors: Silvano Gai, Thomas James Edsall
  • Publication number: 20040153854
    Abstract: Methods and devices are provided for encapsulating FC frames from a network device as Ethernet frames. Preferably, the FC frames represent traffic for a plurality of ports of the network device. The encapsulated Ethernet frames may be input to a conventional network interface card of a personal computer (“PC”) or laptop. Therefore, encapsulating the FC frames allows an engineer to use software installed on a conventional PC to troubleshoot problems with a network using FC protocol. According to some aspects of the invention, FC frames may be truncated to various degrees, to allow smaller data frames to be output at an appropriate rate to the analyzing personal computer, laptop, etc.
    Type: Application
    Filed: April 7, 2003
    Publication date: August 5, 2004
    Applicant: Andiamo Systems, Inc.
    Inventors: Pawan Agrawal, Sujatha Sundaraaraman, Ritu Aggarwal, Silvano Gai, Dinesh Ganapathy Dutt
  • Publication number: 20040139167
    Abstract: An apparatus and method for a scalable network attached storage system. The apparatus includes a scalable network attached storage system, the network attached storage system including one or more termination nodes, one or more file server nodes for maintaining file systems, one or more disk controller nodes for accessing storage disks respectively, and a switching fabric coupling the one or more termination node, file server nodes, and disk controller nodes. The one or more termination nodes, file server nodes and disk controller nodes can be scaled as needed to meet user demands.
    Type: Application
    Filed: December 6, 2002
    Publication date: July 15, 2004
    Applicant: Andiamo Systems Inc., A Delaware Corporation
    Inventors: Thomas James Edsall, Mario Mazzola, Prem Jain, Silvano Gai, Luca Cafiero, Maurilio De Nicolo
  • Publication number: 20040109443
    Abstract: A fast, lightweight, reliable, packet-based protocol that operates independent of the type of networking protocol used by the underlying physical layer of the network is disclosed. More specifically, the packet based protocol operates independently of or is capable of encapsulating physical layer protocols such as but not limited to MAC, Ethernet, Ethernet II, HARD or IP. The protocol defines at least three different types of frames including Information frames, Supervisory frames, and Unnumbered frames. In various embodiments of the invention, the Information, Supervisory, and Unnumbered frames include DSAP and SSAP field with semantics which are sufficiently large to support the various physical layer protocols that may be used on the network. The Information frames, Supervisory frames, and Unnumbered frames also have the ability to support urgent data delivery and certain memory management functions.
    Type: Application
    Filed: December 6, 2002
    Publication date: June 10, 2004
    Applicant: Andiamo Systems Inc.
    Inventors: Silvano Gai, Davide Bergamasco, Claudio DeSanti, Dante Malagrino, Fabio R. Maino
  • Patent number: 6714985
    Abstract: An IP packet reassembly engine provides high-speed and efficient reassembly of IP fragments received at an intermediate station in a computer network. The IP packet reassembly engine comprises a main controller logic circuit configured to “speed-up” re-assembly of original packets from IP fragments stored in a frame buffer at multi-gigabit per second rates. To that end, the reassembly engine further includes a content addressable memory having a plurality of entries for maintaining status information for each received fragment and for each original packet being reassembled from the fragments.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: March 30, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Dante Malagrino, Thomas J. Edsall, Silvano Gai
  • Patent number: 6697360
    Abstract: A method and apparatus for auto-configuring layer 3 intermediate devices in computer networks by extending the Dynamic Host Configuration Protocol (DHCP). The devices generate, transmit and receive DHCP messages having novel options embedded therein. The options permit a layer 3 device to request and receive from a DHCP server a unique, overall IP address that may be assigned to the device. The device may also request and receive one or more IP subnets and corresponding IP addresses for each of its interfaces. The device may further receive the routing protocols to be used on the various subnets. The layer 3 device can thus be auto-configured with IP configuration parameters, including IP subnets, IP addresses and routing protocols without the time-consuming, manual involvement of a network administrator.
    Type: Grant
    Filed: September 2, 1998
    Date of Patent: February 24, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Silvano Gai, Keith McCloghrie, Yakov Rekhter
  • Publication number: 20040027987
    Abstract: Methods and apparatus are provided for credit-based flow control. Techniques allow a receiver to provide buffer characteristic information to a sender using a single extended receiver ready signal. Multiple credits can be allocated using a single extended receiver ready signal as well. Counters and registers are used to allow for the accidental loss of extended receiver ready signals while still maintaining an accurate reflection of the types and numbers of buffers available.
    Type: Application
    Filed: July 25, 2002
    Publication date: February 12, 2004
    Applicant: Andiamo Systems, Inc.
    Inventors: Davide Bergamasco, Silvano Gai, Thomas James Edsall, Ray Kloth