Patents by Inventor Silvia Brini

Silvia Brini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for managing the supply of information, such as instructions, to a microprocessor, and a corresponding system
    Patent number: 11275589
    Abstract: A processor interacts with a memory set including a cache memory, a first memory storing at least a first piece of information in a first information group, and a second memory storing at least a second piece of information in a second information group. In response to a first cache miss and following a first request from the processor for the first piece of information, the first piece of information obtained from the first memory is supplied to the processor. After a second request from the processor for the second piece of information, the second piece of information obtained from the second memory is supplied to the processor, even if the first information group is currently being transferred from the first memory for loading into the cache memory.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: March 15, 2022
    Assignees: STMicroelectronics (Rousset) SAS, STMicroelectronics (Grenoble 2) SAS
    Inventors: Sebastien Metzger, Silvia Brini
  • METHOD FOR MANAGING THE SUPPLY OF INFORMATION, SUCH AS INSTRUCTIONS, TO A MICROPROCESSOR, AND A CORRESPONDING SYSTEM
    Publication number: 20200097294
    Abstract: A processor interacts with a memory set including a cache memory, a first memory storing at least a first piece of information in a first information group, and a second memory storing at least a second piece of information in a second information group. In response to a first cache miss and following a first request from the processor for the first piece of information, the first piece of information obtained from the first memory is supplied to the processor. After a second request from the processor for the second piece of information, the second piece of information obtained from the second memory is supplied to the processor, even if the first information group is currently being transferred from the first memory for loading into the cache memory.
    Type: Application
    Filed: September 17, 2019
    Publication date: March 26, 2020
    Applicants: STMicroelectronics (Rousset) SAS, STMicroelectronics (Grenoble 2) SAS
    Inventors: Sebastien METZGER, Silvia BRINI
  • Method for adjusting at least one operating point of at least one integrated circuit of a system on a chip, and corresponding system on a chip
    Patent number: 10514749
    Abstract: A system on a chip includes at least one integrated circuit that is configured to operate at least at one operating point. A monitoring circuit acquires at least the cumulative duration of activity of the at least one integrated circuit. An evaluation circuit establish at least one instantaneous state of aging of the at least one integrated circuit based on the at least one cumulative duration of activity. An adjustment circuit operates to change the at least one operating point on the basis of the at least one state of aging of the at least one integrated circuit.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: December 24, 2019
    Assignees: STMicroelectonics (Crolles 2) SAS, STMicroelectronics (Alps) SAS, STMicroelectronics SA
    Inventors: Vincent Huard, Silvia Brini, Chittoor Parthasarathy
  • METHOD FOR ADJUSTING AT LEAST ONE OPERATING POINT OF AT LEAST ONE INTEGRATED CIRCUIT OF A SYSTEM ON A CHIP, AND CORRESPONDING SYSTEM ON A CHIP
    Publication number: 20180039320
    Abstract: A system on a chip includes at least one integrated circuit that is configured to operate at least at one operating point. A monitoring circuit acquires at least the cumulative duration of activity of the at least one integrated circuit. An evaluation circuit establish at least one instantaneous state of aging of the at least one integrated circuit based on the at least one cumulative duration of activity. An adjustment circuit operates to change the at least one operating point on the basis of the at least one state of aging of the at least one integrated circuit.
    Type: Application
    Filed: March 23, 2017
    Publication date: February 8, 2018
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Alps) SAS, STMicroelectronics SA
    Inventors: Vincent Huard, Silvia Brini, Chittoor Parthasarathy