Abstract: A storage system may include a memory device including a first region including a single-level cell and a second region different from the first region, and a storage controller configured to read data from the first region at a first gear level of a plurality of gear levels, determine an error level of the read data and a state of the memory device, and change the first gear level to a second gear level of the plurality of gear levels based on the determined error level of the data and the determined state of the memory device.

Abstract: A storage device is provided. The storage device includes a memory device including a memory cell array configured to store metadata and main data and a storage controller configured to access the memory device and control the memory device, wherein the storage controller is configured to read data from the memory device at a speed adaptively varying to a first read speed or a second read speed according to a state of the memory device, the second read speed being faster than the first read speed.

Abstract: A storage device may include, at least one memory device including at least a first single-level cell (SLC) region, a second SLC region, and at least one multi-level cell (MLC) region, the first SLC region having a higher data read speed than the second SLC region, and the second SLC region having a higher data read speed than the at least one MLC region, and a storage controller configured to control the migration of data among the first SLC region, the second SLC region, and the at least one MLC region.

Abstract: A storage system may include a memory device including a first region including a single-level cell and a second region different from the first region, and a storage controller configured to read data from the first region at a first gear level of a plurality of gear levels, determine an error level of the read data and a state of the memory device, and change the first gear level to a second gear level of the plurality of gear levels based on the determined error level of the data and the determined state of the memory device.

Abstract: A storage device may include, at least one memory device including at least a first single-level cell (SLC) region, a second SLC region, and at least one multi-level cell (MLC) region, the first SLC region having a higher data read speed than the second SLC region, and the second SLC region having a higher data read speed than the at least one MLC region, and a storage controller configured to control the migration of data among the first SLC region, the second SLC region, and the at least one MLC region.

Abstract: A storage device is provided. The storage device includes a memory device including a memory cell array configured to store metadata and main data and a storage controller configured to access the memory device and control the memory device, wherein the storage controller is configured to read data from the memory device at a speed adaptively varying to a first read speed or a second read speed according to a state of the memory device, the second read speed being faster than the first read speed.

Abstract: A data storage device and a method of operating the same are provided. The data storage device includes a first non-volatile memory device, a second non-volatile memory device, and a management module. The management module receives a multi-access command including first and second physical addresses which are different from each other from a host, generates and sends a first access command including the first physical address to the first non-volatile memory device, and generates and sends a second access command including the second physical address to the second non-volatile memory device. The data storage device performs the first and second access commands on the first and second physical addresses, respectively.

Abstract: An operation method of a memory controller which is configured to control a nonvolatile memory device includes receiving a command from the outside, calculating a delay time based on a currently available write buffer, a previously available write buffer, and a reference value, and processing the command based on the delay time.

Abstract: A data storage device and a method of operating the same are provided. The data storage device includes a first non-volatile memory device, a second non-volatile memory device, and a management module. The management module receives a multi-access command including first and second physical addresses which are different from each other from a host, generates and sends a first access command including the first physical address to the first non-volatile memory device, and generates and sends a second access command including the second physical address to the second non-volatile memory device. The data storage device performs the first and second access commands on the first and second physical addresses, respectively.

Abstract: A data storage device and a method of operating the same are provided. The data storage device includes a first non-volatile memory device, a second non-volatile memory device, and a management module. The management module receives, from a host, an external multi-access command including first and second physical addresses which are different from each other, generates and sends a first access command including the first physical address to the first non-volatile memory device, and generates and sends a second access command including the second physical address to the second non-volatile memory device. The data management module performs operations on the first and second non-volatile memory devices based on the first and second access commands and the first and second physical addresses, respectively. The data storage device may be a solid state drive (SSD) including NAND flash memory, and the multi-access command may be a multi-write, multi-read, or multi-erase command.

Abstract: A method of operating a data storage device in which a nonvolatile memory is included and a mapping table defining a mapping relation between a physical address and a logical address of the nonvolatile memory is stored in a host memory buffer of a host memory includes requesting a host for an asynchronous event based on information about a map miss that the mapping relation about the logical address received from the host is not included in the mapping table, receiving information about the host memory buffer adjusted by the host based on the asynchronous event, and updating the mapping table to the adjusted host memory buffer with reference to the information about the host memory buffer. A method of operating a data storage device according to example embodiments of the inventive concept can reduce the number of map misses or improve reliability of a nonvolatile memory.

Abstract: An operation method of a memory controller which is configured to control a nonvolatile memory device includes receiving a command from the outside, calculating a delay time based on a currently available write buffer, a previously available write buffer, and a reference value, and processing the command based on the delay time.

Abstract: A semiconductor device includes a memory cell array including a first memory region and a second memory region; a plurality of register sets for storing a plurality of parameter sets; and a control logic circuit configured to, activate a first register set among the plurality of register sets in response to a selection signal, and perform an access operation on the first memory region using a parameter set stored in an activated register set from among the plurality of register sets.

Abstract: An operation method of a storage device, which is connected to a host through an interface sharing a memory buffer of the host, includes receiving an access command from the host, anticipating data that is expected to be requested by the host with reference to the access command, reading out the anticipated data from a nonvolatile memory device and loading the read data to a first area of the memory buffer, and in a case of being requested to load the anticipated data into a second area of the memory buffer by the host, moving the anticipated data from the first area to the second area.

Abstract: A method of operating a data storage device in which a nonvolatile memory is included and a mapping table defining a mapping relation between a physical address and a logical address of the nonvolatile memory is stored in a host memory buffer of a host memory includes requesting a host for an asynchronous event based on information about a map miss that the mapping relation about the logical address received from the host is not included in the mapping table, receiving information about the host memory buffer adjusted by the host based on the asynchronous event, and updating the mapping table to the adjusted host memory buffer with reference to the information about the host memory buffer. A method of operating a data storage device according to example embodiments of the inventive concept can reduce the number of map misses or improve reliability of a nonvolatile memory.

Abstract: A data storage device and a method of operating the same are provided. The data storage device includes a first non-volatile memory device, a second non-volatile memory device, and a management module. The management module receives a multi-access command including first and second physical addresses which are different from each other from a host, generates and sends a first access command including the first physical address to the first non-volatile memory device, and generates and sends a second access command including the second physical address to the second non-volatile memory device. The data storage device performs the first and second access commands on the first and second physical addresses, respectively.

Abstract: An operation method of a storage device, which is connected to a host through an interface sharing a memory buffer of the host, includes receiving an access command from the host, anticipating data that is expected to be requested by the host with reference to the access command, reading out the anticipated data from a nonvolatile memory device and loading the read data to a first area of the memory buffer, and in a case of being requested to load the anticipated data into a second area of the memory buffer by the host, moving the anticipated data from the first area to the second area.

Abstract: A semiconductor device includes a memory cell array including a first memory region and a second memory region; a plurality of register sets for storing a plurality of parameter sets; and a control logic circuit configured to, activate a first register set among the plurality of register sets in response to a selection signal, and perform an access operation on the first memory region using a parameter set stored in an activated register set from among the plurality of register sets.

Abstract: The solid state drive device includes a memory device including a plurality of flash memories and a memory controller connected with a host and configured to control the memory device. The memory controller includes first and second cores, a host interface configured to interface with the host, and a flash memory controller configured to control the plurality of flash memories. The first core is configured to control transmission and reception of data to and from the host. The second core is configured to control transmission and reception of data to and from the memory device.

Abstract: The solid state drive device includes a memory device including a plurality of flash memories and a memory controller connected with a host and configured to control the memory device. The memory controller includes first and second cores, a host interface configured to interface with the host, and a flash memory controller configured to control the plurality of flash memories. The first core is configured to control transmission and reception of data to and from the host. The second core is configured to control transmission and reception of data to and from the memory device.