Abstract: A semiconductor device includes a first processing unit configured to perform a calculation by using data stored in a memory; and a memory path controller configured to communicate with the first processing unit and control the memory for the first processing unit to perform the calculation, wherein the memory path controller includes an address region control unit configured to divide an address space of the memory to include a secure address and a non-secure address and permit the first processing unit to access the secure address or the non-secure address, and a first content firewall unit connected with the address region control unit and configured to prevent the first processing unit from writing secure contents in the non-secure address.

Abstract: A page descriptor can be stored in advance in a memory management unit under various conditions so that an address translation overhead can be reduced. The memory management unit comprises an address translation unit that receives a memory access request as a virtual address and translates the virtual address to a physical address. A translation lookaside buffer (TLB) stores page descriptors of a plurality of physical addresses, the address translation unit determining whether a page descriptor corresponding to a received virtual address is present in the translation lookaside buffer. A prefetch buffer stores page descriptors of the plurality of physical addresses.

Abstract: A semiconductor device includes a first processing unit configured to perform a calculation by using data stored in a memory; and a memory path controller configured to communicate with the first processing unit and control the memory for the first processing unit to perform the calculation, wherein the memory path controller includes an address region control unit configured to divide an address space of the memory to include a secure address and a non-secure address and permit the first processing unit to access the secure address or the non-secure address, and a first content firewall unit connected with the address region control unit and configured to prevent the first processing unit from writing secure contents in the non-secure address.

Abstract: A memory management unit comprises an address translation unit that receives a memory access request as a virtual address and translates the virtual address to a physical address. A translation lookaside buffer stores page descriptors of a plurality of physical addresses, the address translation unit determining whether a page descriptor of a received virtual address is present in the translation lookaside buffer. A prefetch buffer stores page descriptors of the plurality of physical addresses. The address translation unit, in the event the page descriptor of the received virtual address is not present in the translation lookaside buffer, further determines whether the page descriptor of the received virtual address is present in the prefetch buffer; updates the translation lookaside buffer with the page descriptor in response to the determination; and performs a translation of the virtual address to a physical address using the page descriptor.