Patents by Inventor Simin Liu
Simin Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250017006Abstract: Structures of a three-dimensional (3D) memory device and systems containing the same are disclosed. In one example, the 3D memory device includes a memory plane, where the memory plane includes a first edge and an array of blocks. The array of blocks includes a plurality of memory blocks configured to store data, where the plurality of memory blocks are separated by continuous slit structures, and a first dummy region between the first edge and the plurality of memory blocks. The first dummy region includes alternating first slit structures and second slit structures, where the first slit structures and the second slit structures are discontinuous slit structures.Type: ApplicationFiled: August 15, 2023Publication date: January 9, 2025Inventors: Fan Gong, Simin Liu, Bin Yuan, Bo Xu, Wei Xu, Lei Xue, Zongliang Huo
-
Publication number: 20240318203Abstract: Microfluidic apparatuses and methods of making and using them. In particular, described herein are microfluidic cartridges, such as digital microfluidic cartridges, including micro-electroporation electrodes and systems for using them in which droplets may be moved by electrowetting and electroporated in the same regions.Type: ApplicationFiled: June 8, 2022Publication date: September 26, 2024Inventors: Mais J. JEBRAIL, Ryan MONTES, An-Angela VAN, Ik Pyo HONG, Eduardo CERVANTES, Simin LIU, Louis DALTCHEV, Foteini CHRISTODOULOU
-
Publication number: 20240215231Abstract: A semiconductor device includes N number of decks. Each deck includes alternating word line layers and insulating layers. Each deck includes two first gate line slit (GLS) structures and a second GLS structure positioned between the two first GLS structures. The two first GLS structures and the second GLS structures each extend in an X-Z plane and cut through the word line layers and the insulating layers of the respective deck. At least one second GLS structure of at least one deck in the N umber of decks includes multiple sub-GLS structures. The multiple sub-GLS structures are separate from each other.Type: ApplicationFiled: December 28, 2022Publication date: June 27, 2024Applicant: Yangtze Memory Technologies Co., Ltd.Inventors: SiMin LIU, Wei XU, Bin YUAN, Bo XU, Yali GUO, Beibei LI, Lei XUE, ZongLiang HUO
-
Publication number: 20240215238Abstract: A semiconductor device includes decks stacked over a semiconductor layer in a vertical direction. Each deck includes alternating word line layers and insulating layers. A gate line structure (GLS) extends through the word line layers and the insulating layers of the decks. A channel structure extends through the word line layers and the insulating layers of the decks. A sidewall of the GLS is discontinuous at a border between two neighboring decks, and a sidewall of the channel structure is discontinuous at an interface between two neighboring decks. The GLS includes a first GLS that includes a gate line slit, a second GLS that includes sub-GLSs spaced apart from each other in a horizontal direction, or a combination thereof.Type: ApplicationFiled: December 29, 2022Publication date: June 27, 2024Applicant: Yangtze Memory Technologies Co., Ltd.Inventors: Beibei LI, SiMin LIU, Wei XU, Bin YUAN, Bo XU, Yali GUO, Zongke XU, Jiajia WU, ZongLiang HUO, Lei XUE
-
Patent number: 11818891Abstract: A memory device includes a staircase region and an array region, along a first lateral direction; a wall structure in the staircase region; and a first separation structure in the array region and arranged along the first lateral direction with the wall structure. The wall structure includes dielectric pairs of a first dielectric layer and a second dielectric layer stacked in the staircase region. The first separation structure is vertically through a stack structure in the array region. The stack structure includes pairs of the first dielectric layer and an electrode layer.Type: GrantFiled: June 9, 2022Date of Patent: November 14, 2023Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.Inventors: Kai Han, Yali Guo, Zhipeng Wu, Lu Zhang, Hang Yin, Simin Liu, Bo Xu
-
Publication number: 20230142381Abstract: The present disclosure discloses a three-dimensional memory and a fabrication method thereof. The fabrication method comprises: forming a stack structure comprising alternately stacked dielectric layers and sacrificial layers; forming a gate line slit penetrating vertically penetrating the stack structure and extending in a first horizontal direction; and etching portions of the dielectric layers and the sacrificial layers adjacent to the gate line slit to form a plurality of recesses, wherein an aperture of each recess in a vertical direction is greater than a thickness of a corresponding sacrificial layer.Type: ApplicationFiled: December 28, 2022Publication date: May 11, 2023Inventors: Simin Liu, Zongliang Huo, Wei Xu, Bo Xu, Yali Guo, Bin Chen, Siliu Zhang, Jie Su
-
Publication number: 20230125309Abstract: A semiconductor device includes: a substrate; stacked layers on the substrate including insulating layers and gate layers that are alternately stacked in a longitudinal direction and extending in a first lateral direction and a second lateral direction; a channel column array including a plurality of channel columns in the stacked layers; a dummy channel column array including a plurality of dummy channel columns in the stacked layers; and a gate isolating trench in the stacked layers, the gate isolating trench extends between the channel column array and the dummy channel column array along the second lateral direction. The first lateral direction and the second lateral direction are perpendicular to each other and are both perpendicular to the longitudinal direction.Type: ApplicationFiled: December 22, 2022Publication date: April 27, 2023Inventors: Simin Liu, Wei Xu, Bo Xu, Yali Guo
-
Publication number: 20220302167Abstract: A memory device includes a staircase region and an array region, along a first lateral direction; a wall structure in the staircase region; and a first separation structure in the array region and arranged along the first lateral direction with the wall structure. The wall structure includes dielectric pairs of a first dielectric layer and a second dielectric layer stacked in the staircase region. The first separation structure is vertically through a stack structure in the array region. The stack structure includes pairs of the first dielectric layer and an electrode layer.Type: ApplicationFiled: June 9, 2022Publication date: September 22, 2022Inventors: Kai HAN, Yali GUO, Zhipeng WU, Lu ZHANG, Hang YIN, Simin LIU, Bo XU
-
Patent number: 11404438Abstract: A memory device includes a substrate; and a stack structure, including alternately arranged first dielectric layers and electrode layers. In a first lateral direction, the memory device includes array regions and a staircase region arranged between array regions. In a second lateral direction, the stack structure includes a first block and a second block, each including a wall-structure region and extending along the first lateral direction. The wall-structure regions of the first block and the second block are adjacent to each other and together form a wall structure in the staircase region. The memory device also includes a first separation structure, formed through the stack structure and positioned between the first block and the second block in array regions along the first lateral direction; and second dielectric layers positioned between the first block and the second block in the staircase region, and alternated with the first dielectric layers.Type: GrantFiled: September 4, 2020Date of Patent: August 2, 2022Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Kai Han, Yali Guo, Zhipeng Wu, Lu Zhang, Hang Yin, Simin Liu, Bo Xu
-
Publication number: 20220052070Abstract: A memory device includes a substrate; and a stack structure, including alternately arranged first dielectric layers and electrode layers. In a first lateral direction, the memory device includes array regions and a staircase region arranged between array regions. In a second lateral direction, the stack structure includes a first block and a second block, each including a wall-structure region and extending along the first lateral direction. The wall-structure regions of the first block and the second block are adjacent to each other and together form a wall structure in the staircase region. The memory device also includes a first separation structure, formed through the stack structure and positioned between the first block and the second block in array regions along the first lateral direction; and second dielectric layers positioned between the first block and the second block in the staircase region, and alternated with the first dielectric layers.Type: ApplicationFiled: September 4, 2020Publication date: February 17, 2022Inventors: Kai HAN, Yali GUO, Zhipeng WU, Lu ZHANG, Hang YIN, Simin LIU, Bo XU
-
Patent number: 10895953Abstract: The present application provides internet browsing especially a three dimensional webpage browsing methods and systems by using the movement of a computing device with a display. By moving the computing device, a user changes the location and the orientation of the computing device, and thus interacts with at least one information item in a first web page. The computing device measures the location difference and the orientation difference between the computing device and the information item, and determines whether each of the location difference and the orientation difference is within a threshold, respectively. If both the location and orientation differences are within the threshold for a predetermined time, the user is directed to a second web page.Type: GrantFiled: August 19, 2019Date of Patent: January 19, 2021Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Simin Liu, Jianxin Huang, Liang Guo
-
Publication number: 20190369840Abstract: The present application provides internet browsing especially a three dimensional webpage browsing methods and systems by using the movement of a computing device with a display. By moving the computing device, a user changes the location and the orientation of the computing device, and thus interacts with at least one information item in a first web page. The computing device measures the location difference and the orientation difference between the computing device and the information item, and determines whether each of the location difference and the orientation difference is within a threshold, respectively. If both the location and orientation differences are within the threshold for a predetermined time, the user is directed to a second web page.Type: ApplicationFiled: August 19, 2019Publication date: December 5, 2019Inventors: Simin LIU, Jianxin Huang, Liang Guo
-
Publication number: 20180152767Abstract: Embodiments of the present application relate to a method, device, and system for processing playback of video data. The method includes obtaining an instruction during playback of video data, generating a request for data based at least in part on the instruction, wherein the request for data comprises information associated with the video data, communicating the request for data, obtaining results associated with the request for data, wherein the results associated with the request for data comprise one or more related objects relating to the video data, the one or more related objects corresponding to one or more respective application types, at least one of the one or more application types corresponding to at least one of the one or more related objects differing from an application type of the video data, and providing at least one of the one or more related objects concurrently with the video data.Type: ApplicationFiled: November 27, 2017Publication date: May 31, 2018Inventors: Simin Liu, Jingzhong Lian
-
Patent number: 8513409Abstract: Inverted cucurbituril compounds having at least one pair of hydrogen atoms protruding into an internal molecular cavity thereof.Type: GrantFiled: July 24, 2006Date of Patent: August 20, 2013Assignees: University of Maryland, Pohang University of Science and TechnologyInventors: Kimoon Kim, Sang-Kyu Park, Young Ho Ko, Hyunuk Kim, Youngkook Kim, Narayanan Selvapalam, Lyle David Isaacs, Simin Liu
-
Publication number: 20120157378Abstract: Aspects of the invention include methods of predicting a subject's susceptibility to developing type 2 diabetes. Embodiments of the methods include obtaining a sex hormone-binding globulin (SHBG) level value for the subject, e.g., by detecting a SHBG plasma concentration and/or a SHBG polymorphism phenotype, and predicting the subject's susceptibility to developing type 2 diabetes from the obtained SHBG level value. Also provided are devices and kits that find use in practicing embodiments of the methods. In addition, methods of treating a subject for type 2 diabetes and/or preventing the onset of type 2 diabetes are provided.Type: ApplicationFiled: November 16, 2009Publication date: June 21, 2012Inventors: Simin Liu, Eric L. Ding, Joann E. Manson
-
Publication number: 20100010215Abstract: Inverted cucurbituril compounds having at least one pair of hydrogen atoms protruding into an internal molecular cavity thereof.Type: ApplicationFiled: July 24, 2006Publication date: January 14, 2010Applicant: THE UNIVERSITY OF MARYLANDInventors: Lyle David Isaacs, Simin Liu, Kimoon Kim, Sang-Kyu Park, Young Ho Ko, Hyunuk Kim, Youngkook Kim, Narayanan Selvapalam