Patents by Inventor Simon A. Zaidel

Simon A. Zaidel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5408742
    Abstract: The invention relates to an air bridge and an evaporative process for making air bridges. A first layer of photoresist is patterned to create two openings over the contacts to be connected, separated by a strip of photoresist. The photoresist strip is hard baked to allow it to soften and to cause further cross linking. The softening allows surface tension to reshape the photoresist strip to create a gradually sloping arcuate surface between contact openings upon which a metal layer of nearly constant thickness may be evaporated. A second layer of photoresist is then applied, and patterned to create a single large opening embracing both contacts and the now arcuate hard baked photoresist strip. An arch within the large opening connecting both contacts is formed by evaporation. Excess metal and both photoresist layers are then removed, leaving a novel, arch shaped air bridge.
    Type: Grant
    Filed: October 22, 1993
    Date of Patent: April 25, 1995
    Assignee: Martin Marietta Corporation
    Inventors: Simon A. Zaidel, Terrence S. Alcorn, William F. Kopp, George C. Pifer
  • Patent number: 5310104
    Abstract: The invention discloses a novel method and apparatus for cleaving semiconductor wafers into individual die which comprises mounting the wafer upon an adherent resilient air impermeable membrane while the latter is flat. Cleaving is achieved by using air pressure to inflate the membrane to cause bending and tensile stresses on the wafer brought about by its adhesion to the inflating membrane. These stresses cleave the wafer along the scribe marks to form individual die. The die may be easily removed by the application of a vacuum to the underside of the membrane which draws it against a perforated undulatory grid dimensioned according to the die dimensions to reduce the surface contact. This reduces adhesion of the die to the membrane to facilitate a low stress pick-off of the die.
    Type: Grant
    Filed: December 16, 1991
    Date of Patent: May 10, 1994
    Assignee: General Electric Company
    Inventors: Simon A. Zaidel, Walter Fabian, Brian G. Baxter, Albert J. Manoni
  • Patent number: 4418470
    Abstract: A fabrication technique for monolithic microwave integrated circuits employs silicon-on-sapphire wafers. Active and passive elements are formed together in a series of implant and deposition steps. Electrically isolated islands of semiconductor material are defined upon the substrate. Multiple metallization deposits are employed to simultaneously interconnect the individual circuit elements and form passive elements upon the integrated circuit. The technique allows mass production of integrated circuits with considerable raw material savings.
    Type: Grant
    Filed: October 21, 1981
    Date of Patent: December 6, 1983
    Assignee: General Electric Company
    Inventors: Ronald J. Naster, Simon A. Zaidel, Ying-Chen Hwang, Earl L. Parks, William R. Cady
  • Patent number: 4289846
    Abstract: Several methods are disclosed for forming an air gap between crossing thin film conductors utilized to interconnect electronic components on a substrate. Each of the methods involves the use of photolithographic techniques to form overpassing conductors on a support material covering the overpassed conductors, followed by removal of the support material. Both deposition and plating techniques are described for forming the overpassing conductors.
    Type: Grant
    Filed: December 28, 1979
    Date of Patent: September 15, 1981
    Assignee: General Electric Company
    Inventors: Earl L. Parks, Simon A. Zaidel