Abstract: A method for performing quantum computations in a qudit processor. The qudit processor comprises a plurality of tracks, each comprising first, second and third locations. The method comprises: receiving qudits at manipulation devices inrespective tracks; manipulating the state of the qudits; transferring each qudit from the manipulation device to the first location in each track; enabling interaction between the first and second qudits; transferring each qudit from the first to second location; enabling interaction between the first and third qudits; transferring each qudit from the second to third location; and enabling interaction between the first and fourth qudits. The method further comprises either: transferring each qudit from the third to first location; and enabling interaction between the first and second qudits; or: transferring each qudit from the third location to the manipulation device in their respective tracks; and manipulating the state of each qudit.

Abstract: A method of mitigating errors in quantum computing, wherein the method comprises: performing (S101) an operation on the state of a qubit in a group of qubits a plurality of times, wherein the operation has a first error rate, and wherein each performance of the operation comprises: performing a first operation comprising: a gate operation, a symmetry operation, and a first basis operation; or performing a second operation comprising: the gate operation, the symmetry operation, and a second basis operation; wherein the first and second basis operations are different basis operations selected from a set of basis operations; and measuring the state of the qubit; wherein the probability of performing the first operation is a first probability, and the probability of performing the second operation is a second probability; obtaining (S102) a symmetry measurement for the group of qubits after each performance of the operation using the symmetry operation, wherein the group of qubits comprises a plurality of qubits;

Abstract: A method of mitigating errors when using a quantum computer comprising: performing S101 a first operation (21) on the state of a qubit a plurality of times; wherein the first operation (21) has a first error rate (32); obtaining S102 a first measurement of the average state of the qubit; modifying S103 the error rate of the quantum computer from the first error rate (32) to a second error rate (34); performing S104 a second operation (23) on the state of the qubit a plurality of times; wherein the second operation (23) has the second error rate (34); obtaining S105 a second measurement of the average state of the qubit; modifying S106 the error rate of the quantum computer from the second error rate to a third error rate; performing S107 a third operation on the state of the qubit a plurality of times; wherein the third operation has the third error rate; obtaining S108 a third measurement of the average state of the qubit; modifying S109 the error rate of the quantum computer from the third error rate to a f

Abstract: Methods are disclosed for controlling charge stability in a device for quantum information processing. According to examples, a device for quantum information processing comprises a first plurality of confinement regions confining spinful charge carriers for use as qudits. The device further comprises a second plurality of confinement regions confining spinful charge carriers, each confinement region of the second plurality of confinement regions adjacent to a confinement region of the first plurality of confinement regions. The device further comprises one or more charge reservoirs, wherein each confinement region of the second plurality of confinement regions is attachable to a charge reservoir.

Abstract: A method of mitigating errors when using a quantum computer comprising: performing S101 a first operation (21) on the state of a qubit a plurality of times; wherein the first operation (21) has a first error rate (32); obtaining S102 a first measurement of the average state of the qubit; modifying S103 the error rate of the quantum computer from the first error rate (32) to a second error rate (34); performing S104 a second operation (23) on the state of the qubit a plurality of times; wherein the second operation (23) has the second error rate (34); obtaining S105 a second measurement of the average state of the qubit; modifying S106 the error rate of the quantum computer from the second error rate to a third error rate; performing S107 a third operation on the state of the qubit a plurality of times; wherein the third operation has the third error rate; obtaining S108 a third measurement of the average state of the qubit; modifying S109 the error rate of the quantum computer from the third error rate to a f

Abstract: A method of mitigating errors in quantum computing, wherein the method comprises: performing (S101) an operation on the state of a qubit in a group of qubits a plurality of times, wherein the operation has a first error rate, and wherein each performance of the operation comprises: performing a first operation comprising: a gate operation, a symmetry operation, and a first basis operation; or performing a second operation comprising: the gate operation, the symmetry operation, and a second basis operation; wherein the first and second basis operations are different basis operations selected from a set of basis operations; and measuring the state of the qubit; wherein the probability of performing the first operation is a first probability, and the probability of performing the second operation is a second probability; obtaining (S102) a symmetry measurement for the group of qubits after each performance of the operation using the symmetry operation, wherein the group of qubits comprises a plurality of qubits;

Abstract: A method for performing quantum computations in a qubit processor is provided, comprising the steps of: configuring a first location 843 in a first set of locations 802 to perform 902 a first one-qubit operation; configuring a second location 844 in the first set of locations 802 to perform 902 a second one-qubit operation; configuring a first location 845 and a second location 846 in a second set of locations 803 to enable 906 a two-qubit interaction; receiving 901 a first qubit 831 at the first location 843 in the first set of locations 802 at time t1; receiving 901 a second qubit 832 at the second location 844 in the first set of locations 802 at time t1; wherein the first qubit and the second qubit are provided within a first qubit group comprising n qubits, wherein n>2; performing 902 the first one-qubit operation on the state of the first qubit 831 at the first location 843 in the first set of locations 802; performing 902 the second one-qubit operation on the state of the second qubit 832 at the sec

Abstract: Methods are disclosed for controlling charge stability in a device for quantum information processing. According to examples, a device for quantum information processing comprises a first plurality of confinement regions confining spinful charge carriers for use as audits. The device further comprises a second plurality of confinement regions confining spinful charge carriers, each confinement region of the second plurality of confinement regions adjacent to a confinement region of the first plurality of confinement regions. The device further comprises one or more charge reservoirs, wherein each confinement region of the second plurality of confinement regions is attachable to a charge reservoir.

Abstract: The present disclosure relates to novel memristive devices, uses thereof, and processes for their preparation. In a first aspect, the disclosure provides a quantum memristor, including a first quantum dot (QD1) which is capacitively coupled to a second quantum dot (QD2), a source electrode, a drain electrode, and a bath electrode, wherein the source electrode and the drain electrode are coupled via quantum tunneling to QD1 and the bath electrode is coupled via quantum tunneling to QD2, and wherein QD2 is capacitively coupled to either the source electrode or the drain electrode.

Abstract: The present disclosure relates to novel memristive devices, uses thereof, and processes for their preparation. In a first aspect, the disclosure provides a quantum memristor, including a first quantum dot (QD1) which is capacitively coupled to a second quantum dot (QD2), a source electrode, a drain electrode, and a bath electrode, wherein the source electrode and the drain electrode are coupled via quantum tunnelling to QD1 and the bath electrode is coupled via quantum tunnelling to QD2, and wherein QD2 is capacitively coupled to either the source electrode or the drain electrode.

Abstract: A device for the storage and/or processing of quantum information comprises: a body (6), formed from a material having negligible net nuclear or electronic magnetic field; a set of data entities (4) embedded in said body, each having a plurality of magnetic field states; a set of probes (2), offset from the body, arranged to acquire internal phase shifts due to the magnetic fields of said data entities; wherein the probes (2) are each arranged to move relative to a plurality of data entities (4) in order that each probe (2) acquires an internal phase shift from the plurality of data entities (4); and means for reading each probe (2), thereby establishing a parity of the plurality of data entities (4).

Abstract: A device for the storage and/or processing of quantum information comprises: a body (6), formed from a material having negligible net nuclear or electronic magnetic field; a set of data entities (4) embedded in said body, each having a plurality of magnetic field states; a set of probes (2), offset from the body, arranged to acquire internal phase shifts due to the magnetic fields of said data entities; wherein the probes (2) are each arranged to move relative to a plurality of data entities (4) in order that each probe (2) acquires an internal phase shift from the plurality of data entities (4); and means for reading each probe (2), thereby establishing a parity of the plurality of data entities (4).