Patents by Inventor Simon CHAI

Simon CHAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD AND CIRCUIT TO ISOLATE BODY CAPACITANCE IN SEMICONDUCTOR DEVICES
    Publication number: 20240088842
    Abstract: Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Garming LIANG, Simon CHAI, Tzu-Jin YEH, En-Hsiang YEH, Wen-Sheng CHEN
  • Method and circuit to isolate body capacitance in semiconductor devices
    Patent number: 11855590
    Abstract: Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Garming Liang, Simon Chai, Tzu-Jin Yeh, En-Hsiang Yeh, Wen-Sheng Chen
  • METHOD AND CIRCUIT TO ISOLATE BODY CAPACITANCE IN SEMICONDUCTOR DEVICES
    Publication number: 20230112936
    Abstract: Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
    Type: Application
    Filed: December 14, 2022
    Publication date: April 13, 2023
    Inventors: Garming LIANG, Simon CHAI, Tzu-Jin YEH, En-Hsiang YEH, Wen-Sheng CHEN
  • Method and circuit to isolate body capacitance in semiconductor devices
    Patent number: 11558019
    Abstract: Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: January 17, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Garming Liang, Simon Chai, Tzu-Jin Yeh, En-Hsiang Yeh, Wen-Sheng Chen
  • METHOD AND CIRCUIT TO ISOLATE BODY CAPACITANCE IN SEMICONDUCTOR DEVICES
    Publication number: 20200162041
    Abstract: Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
    Type: Application
    Filed: November 4, 2019
    Publication date: May 21, 2020
    Inventors: Garming LIANG, Simon CHAI, Tzu-Jin YEH, En-Hsiang YEH, Wen-Sheng CHEN