Abstract: A data processing system is provided comprising fetching logic for fetching program instructions for execution, a first data-accessing unit for handling decoding and execution of data access instructions and a second data-accessing unit for handling decoding and execution of program-counter-relative data access instructions. Handling of the program-counter-relative data access instructions by the second data-accessing unit is performed differently from the handling of the data access instructions by the first data-accessing unit.

Abstract: A data processing system is provided with a programmable memory protection unit 10 defining a plurality of programmable memory regions 2, 4, 6, 8 each with associated programmable memory attributes. A default memory protection unit 22 is provided and defines a plurality of default memory regions a, b, c, d, e each with associated default memory attributes. If a miss occurs in the programmable memory protection unit 10, and the memory access is a privileged level memory access, then the default memory protection unit 22 will return default memory attributes for that memory request.

Abstract: An architectural definition of an instruction set is parsed to identify distinct program instructions therein. These distinct program instructions are associated with operand defining data specifying the variables they require. A complete set of such distinct program instructions and their associated operand defining data is generated for the instruction set architecture and used to automatically generate instruction-generating code in respect of each of those distinct program instructions. The instruction-generating code can include an instruction constructor, an instruction mutator and an instruction encoder. The instruction-generating code which is automatically produced may be used by genetic algorithm techniques to develop test programs exploring a wide range of functional state of a data processing system under test.

Abstract: Software built in self test computer programs 12 are generated using a genetic algorithm 14 technique. A fault simulator 20 is used to simulate candidate software built in self test computer programs and compare the simulated execution, such to deliberately introduced test faults, with expected execution outcomes previously derived for that candidate program to determine the sensitivity of that candidate program to the faults which are introduced. This score can be fed back into the genetic algorithm mutation to converge the mutation process upon appropriately fault sensitive software built in self test program code.

Abstract: An architectural definition of an instruction set is parsed to identify distinct program instructions therein. These distinct program instructions are associated with operand defining data specifying the variables they require. A complete set of such distinct program instructions and their associated operand defining data is generated for the instruction set architecture and used to automatically generate instruction-generating code in respect of each of those distinct program instructions. The instruction-generating code can include an instruction constructor, an instruction mutator and an instruction encoder. The instruction-generating code which is automatically produced may be used by genetic algorithm techniques to develop test programs exploring a wide range of functional state of a data processing system under test.

Abstract: Test program sequences of a quasi-minimum length which still produce a predetermined event are automatically generated by a genetic algorithm which requires that mutated programs continue to produce the predetermined event whilst favouring programs of a shorter length. Candidate test program sequences are mutated by removing respective randomly selected programs therefrom and then evaluated using an instruction set simulator, other simulator, real hardware or the like to detect whether the predetermined event is still produced. The predetermined event can take a variety of different forms, such as test failure, critical path stimulation, power consumption reaching predetermined levels, a temporal sequence of events, a concurrent combination of events or the like.

Abstract: A list of program instructions are mapped into memory addresses to form an executable program by simulating their execution in turn so as to determine a memory address of a next program instruction to be executed. That memory address is then examined to determine if a program instruction has already been mapped thereto. If the memory address is empty, then the next program instruction from the list is mapped to that empty memory address and the execution of that next program instruction is simulated and the process repeated. If the memory address is not empty, then the program instruction read from that memory address is simulated again and the process repeated.

Abstract: A test program for a data processing apparatus is produced using a genetic algorithm which mutates instances being ordered lists of program instructions within a population forming the test program. The populations are evaluated using a metric by which the population as a whole is scored for its stimulation of predetermined functional points within the data processing apparatus when a determination is being made as to whether or not a particular instance should be swapped in or out of the population.