Patents by Inventor Simon Gaudet

Simon Gaudet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150225301
    Abstract: The invention relates to an improved composite material comprising a metal matrix component containing Fe and Al and a ceramic component containing refractory hard metals and metalloids or non-metal elements. The ceramic component consists of ceramic nanoparticles whose dimension are below 100 nm. It also relates to a method of preparing this composite material in the form of a coating, which consists of using a thermal spray technique and a powder which is synthesized by high energy mechano-chemical reactions between the components of the composite. The ceramic component of the composite is formed in situ. The above composite material is particularly useful as protective coatings for tribological applications.
    Type: Application
    Filed: September 6, 2013
    Publication date: August 13, 2015
    Inventors: Robert Schulz, Simon Gaudet, Sylvio Savoie
  • Patent number: 8154130
    Abstract: A method for forming germano-silicide contacts atop a Ge-containing layer that is more resistant to etching than are conventional silicide contacts that are formed from a pure metal is provided. The method of the present invention includes first providing a structure which comprises a plurality of gate regions located atop a Ge-containing substrate having source/drain regions therein. After this step of the present invention, a Si-containing metal layer is formed atop the said Ge-containing substrate. In areas that are exposed, the Ge-containing substrate is in contact with the Si-containing metal layer. Annealing is then performed to form a germano-silicide compound in the regions in which the Si-containing metal layer and the Ge-containing substrate are in contact; and thereafter, any unreacted Si-containing metal layer is removed from the structure using a selective etch process. In some embodiments, an additional annealing step can follow the removal step.
    Type: Grant
    Filed: April 23, 2008
    Date of Patent: April 10, 2012
    Assignee: International Business Machines Corporation
    Inventors: Cyril Cabral, Jr., Roy A. Carruthers, Christophe Detavernier, Simon Gaudet, Christian Lavoie, Huiling Shang
  • Patent number: 8003524
    Abstract: An interconnect structure which includes a plating seed layer that has enhanced conductive material, preferably, Cu, diffusion properties is provided that eliminates the need for utilizing separate diffusion and seed layers. Specifically, the present invention provides an oxygen/nitrogen transition region within a plating seed layer for interconnect metal diffusion enhancement. The plating seed layer may include Ru, Ir or alloys thereof, and the interconnect conductive material may include Cu, Al, AlCu, W, Ag, Au and the like. Preferably, the interconnect conductive material is Cu or AlCu. In more specific terms, the present invention provides a single seeding layer which includes an oxygen/nitrogen transition region sandwiched between top and bottom seed regions. The presence of the oxygen/nitrogen transition region within the plating seed layer dramatically enhances the diffusion barrier resistance of the plating seed.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Chih-Chao Yang, Simon Gaudet, Christian Lavoie, Shom Ponoth, Terry A. Spooner
  • Patent number: 7786578
    Abstract: The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: August 31, 2010
    Assignee: International Business Machines Corporation
    Inventors: Christophe Detavenier, Simon Gaudet, Christian Lavoie, Conal E. Murray
  • Patent number: 7732870
    Abstract: The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: June 8, 2010
    Assignee: Internationial Business Machines Corporation
    Inventors: Christophe Detavenier, Simon Gaudet, Christian Lavoie, Conal E. Murray
  • Patent number: 7682968
    Abstract: A method for forming germano-silicide contacts atop a Ge-containing layer that is more resistant to etching than are conventional silicide contacts that are formed from a pure metal is provided. The method of the present invention includes first providing a structure which comprises a plurality of gate regions located atop a Ge-containing substrate having source/drain regions therein. After this step of the present invention, a Si-containing metal layer is formed atop the said Ge-containing substrate. In areas that are exposed, the Ge-containing substrate is in contact with the Si-containing metal layer. Annealing is then performed to form a germano-silicide compound in the regions in which the Si-containing metal layer and the Ge-containing substrate are in contact; and thereafter, any unreacted Si-containing metal layer is removed from the structure using a selective etch process. In some embodiments, an additional annealing step can follow the removal step.
    Type: Grant
    Filed: April 23, 2008
    Date of Patent: March 23, 2010
    Assignee: International Business Machines Corporation
    Inventors: Cyril Cabral, Jr., Roy A. Carruthers, Christophe Detavernier, Simon Gaudet, Christian Lavoie, Huiling Shang
  • Publication number: 20090155996
    Abstract: An interconnect structure which includes a plating seed layer that has enhanced conductive material, preferably, Cu, diffusion properties is provided that eliminates the need for utilizing separate diffusion and seed layers. Specifically, the present invention provides an oxygen/nitrogen transition region within a plating seed layer for interconnect metal diffusion enhancement. The plating seed layer may include Ru, Ir or alloys thereof, and the interconnect conductive material may include Cu, Al, AlCu, W, Ag, Au and the like. Preferably, the interconnect conductive material is Cu or AlCu. In more specific terms, the present invention provides a single seeding layer which includes an oxygen/nitrogen transition region sandwiched between top and bottom seed regions. The presence of the oxygen/nitrogen transition region within the plating seed layer dramatically enhances the diffusion barrier resistance of the plating seed.
    Type: Application
    Filed: July 22, 2008
    Publication date: June 18, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chih-Chao Yang, Simon Gaudet, Christian Lavoie, Shom Ponoth, Terry A. Spooner
  • Patent number: 7498254
    Abstract: An interconnect structure which includes a plating seed layer that has enhanced conductive material, preferably, Cu, diffusion properties is provided that eliminates the need for utilizing separate diffusion and seed layers. Specifically, the present invention provides an oxygen/nitrogen transition region within a plating seed layer for interconnect metal diffusion enhancement. The plating seed layer may include Ru, Ir or alloys thereof and the interconnect conductive material may include Cu, Al, AlCu, W, Ag, Au and the like. Preferably, the interconnect conductive material is Cu or AlCu. In more specific terms, the present invention provides a single seeding layer which includes an oxygen/nitrogen transition region sandwiched between top and bottom seed regions. The presence of the oxygen/nitrogen transition region within the plating seed layer dramatically enhances the diffusion barrier resistance of the plating seed.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: March 3, 2009
    Assignee: International Business Machines Corporation
    Inventors: Chih-Chao Yang, Simon Gaudet, Christian Lavoie, Shom Ponoth, Terry A. Spooner
  • Patent number: 7449782
    Abstract: A method for forming germano-silicide contacts atop a Ge-containing layer that is more resistant to etching than are conventional silicide contacts that are formed from a pure metal is provided. The method of the present invention includes first providing a structure which comprises a plurality of gate regions located atop a Ge-containing substrate having source/drain regions therein. After this step of the present invention, a Si-containing metal layer is formed atop the said Ge-containing substrate. In areas that are exposed, the Ge-containing substrate is in contact with the Si-containing metal layer. Annealing is then performed to form a germano-silicide compound in the regions in which the Si-containing metal layer and the Ge-containing substrate are in contact; and thereafter, any unreacted Si-containing metal layer is removed from the structure using a selective etch process. In some embodiments, an additional annealing step can follow the removal step.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: November 11, 2008
    Assignee: International Business Machines Corporation
    Inventors: Cyril Cabral, Jr., Roy A. Carruthers, Christophe Detavernier, Simon Gaudet, Christian Lavoie, Huiling Shang
  • Publication number: 20080227283
    Abstract: A method for forming gennano-silicide contacts atop a Ge-containing layer that is more resistant to etching than are conventional silicide contacts that are formed from a pure metal is provided. The method of the present invention includes first providing a structure which comprises a plurality of gate regions located atop a Ge-containing substrate having source/drain regions therein. After this step of the present invention, a Si-containing metal layer is formed atop the said Ge-containing substrate. In areas that are exposed, the Ge-containing substrate is in contact with the Si-containing metal layer. Annealing is then performed to form a germano-silicide compound in the regions in which the Si-containing metal layer and the Ge-containing substrate are in contact; and thereafter, any unreacted Si-containing metal layer is removed from the structure using a selective etch process. In some embodiments, an additional annealing step can follow the removal step.
    Type: Application
    Filed: April 23, 2008
    Publication date: September 18, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cyril Cabral, Roy A. Carruthers, Christophe Detavernier, Simon Gaudet, Christian Lavoie, Huiling Shang
  • Publication number: 20080217780
    Abstract: The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
    Type: Application
    Filed: April 17, 2008
    Publication date: September 11, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christophe Detavernier, Simon Gaudet, Christian Lavoie, Conal E. Murray
  • Publication number: 20080220606
    Abstract: A method for forming germano-silicide contacts atop a Ge-containing layer that is more resistant to etching than are conventional silicide contacts that are formed from a pure metal is provided. The method of the present invention includes first providing a structure which comprises a plurality of gate regions located atop a Ge-containing substrate having source/drain regions therein. After this step of the present invention, a Si-containing metal layer is formed atop the said Ge-containing substrate. In areas that are exposed, the Ge-containing substrate is in contact with the Si-containing metal layer. Annealing is then performed to form a germano-silicide compound in the regions in which the Si-containing metal layer and the Ge-containing substrate are in contact; and thereafter, any unreacted Si-containing metal layer is removed from the structure using a selective etch process. In some embodiments, an additional annealing step can follow the removal step.
    Type: Application
    Filed: April 23, 2008
    Publication date: September 11, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cyril Cabral, Roy A. Carruthers, Christophe Detavernier, Simon Gaudet, Christian Lavoie, Huiling Shang
  • Publication number: 20080217781
    Abstract: The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
    Type: Application
    Filed: April 17, 2008
    Publication date: September 11, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christophe Detavernier, Simon Gaudet, Christian Lavoie, Conal E. Murray
  • Patent number: 7419907
    Abstract: The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
    Type: Grant
    Filed: July 1, 2005
    Date of Patent: September 2, 2008
    Assignee: International Business Machines Corporation
    Inventors: Christophe Detavernier, Simon Gaudet, Christian Lavoie, Conal E. Murray
  • Publication number: 20070148826
    Abstract: An interconnect structure which includes a plating seed layer that has enhanced conductive material, preferably, Cu, diffusion properties is provided that eliminates the need for utilizing separate diffusion and seed layers. Specifically, the present invention provides an oxygen/nitrogen transition region within a plating seed layer for interconnect metal diffusion enhancement. The plating seed layer may include Ru, Ir or alloys thereof and the interconnect conductive material may include Cu, Al, AlCu, W, Ag, Au and the like. Preferably, the interconnect conductive material is Cu or AlCu. In more specific terms, the present invention provides a single seeding layer which includes an oxygen/nitrogen transition region sandwiched between top and bottom seed regions. The presence of the oxygen/nitrogen transition region within the plating seed layer dramatically enhances the diffusion barrier resistance of the plating seed.
    Type: Application
    Filed: March 6, 2007
    Publication date: June 28, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chih-Chao Yang, Simon Gaudet, Christian Lavoie, Shom Ponoth, Terry Spooner
  • Patent number: 7215006
    Abstract: An interconnect structure which includes a plating seed layer that has enhanced conductive material, preferably, Cu, diffusion properties is provided that eliminates the need for utilizing separate diffusion and seed layers. Specifically, the present invention provides an oxygen/nitrogen transition region within a plating seed layer for interconnect metal diffusion enhancement. The plating seed layer may include Ru, Ir or alloys thereof, and the interconnect conductive material may include Cu, Al, AlCu, W, Ag, Au and the like. Preferably, the interconnect conductive material is Cu or AlCu. In more specific terms, the present invention provides a single seeding layer which includes an oxygen/nitrogen transition region sandwiched between top and bottom seed regions. The presence of the oxygen/nitrogen transition region within the plating seed layer dramatically enhances the diffusion barrier resistance of the plating seed.
    Type: Grant
    Filed: October 7, 2005
    Date of Patent: May 8, 2007
    Assignee: International Business Machines Corporation
    Inventors: Chih-Chao Yang, Simon Gaudet, Christian Lavoie, Shom Ponoth, Terry A. Spooner
  • Publication number: 20070080429
    Abstract: An interconnect structure which includes a plating seed layer that has enhanced conductive material, preferably, Cu, diffusion properties is provided that eliminates the need for utilizing separate diffusion and seed layers. Specifically, the present invention provides an oxygen/nitrogen transition region within a plating seed layer for interconnect metal diffusion enhancement. The plating seed layer may include Ru, Ir or alloys thereof, and the interconnect conductive material may include Cu, Al, AlCu, W, Ag, Au and the like. Preferably, the interconnect conductive material is Cu or AlCu. In more specific terms, the present invention provides a single seeding layer which includes an oxygen/nitrogen transition region sandwiched between top and bottom seed regions. The presence of the oxygen/nitrogen transition region within the plating seed layer dramatically enhances the diffusion barrier resistance of the plating seed.
    Type: Application
    Filed: October 7, 2005
    Publication date: April 12, 2007
    Applicant: International Business Machines Corporation
    Inventors: Chih-Chao Yang, Simon Gaudet, Christian Lavoie, Shom Ponoth, Terry Spooner
  • Publication number: 20070004205
    Abstract: The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
    Type: Application
    Filed: July 1, 2005
    Publication date: January 4, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christophe Detavernier, Simon Gaudet, Christian Lavoie, Conal E. Murray
  • Publication number: 20050250301
    Abstract: A method for forming germano-silicide contacts atop a Ge-containing layer that is more resistant to etching than are conventional silicide contacts that are formed from a pure metal is provided. The method of the present invention includes first providing a structure which comprises a plurality of gate regions located atop a Ge-containing substrate having source/drain regions therein. After this step of the present invention, a Si-containing metal layer is formed atop the said Ge-containing substrate. In areas that are exposed, the Ge-containing substrate is in contact with the Si-containing metal layer. Annealing is then performed to form a germano-silicide compound in the regions in which the Si-containing metal layer and the Ge-containing substrate are in contact; and thereafter, any unreacted Si-containing metal layer is removed from the structure using a selective etch process. In some embodiments, an additional annealing step can follow the removal step.
    Type: Application
    Filed: May 4, 2004
    Publication date: November 10, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cyril Cabral, Roy Carruthers, Christophe Detavernier, Simon Gaudet, Christian Lavoie, Huiling Shang