Patents by Inventor Simon HALM

Simon HALM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11508601
    Abstract: Holding apparatus 100 for electrostatic holding component 1 (e.g., semiconductor wafer), includes base body 10 with at least one plate 10A, protruding burls 11 on upper side of plate and end faces 12 of which span a burls support plane for supporting component, and electrode device 20 in layered form in spacings between burls and insulator layer 21 which is connected to plate, dielectric layer 23 of inorganic dielectric and electrode layer 22 between insulator and dielectric layers. Between burls support plane and dielectric layer upper side, predetermined gap spacing A is set. Electrode device has openings 24 and is on plate upper side between burls, which protrude therethrough. Insulator layer includes inorganic dielectric and is connected with adhesive 13 to base body upper side between burls. Electrode device is embedded in adhesive. Spacing between burls and electrode device is filled with adhesive. A production method is also described.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: November 22, 2022
    Assignee: ASML Netherlands B.V.
    Inventors: Lars Ziegenhagen, Simon Halm
  • Patent number: 11398398
    Abstract: Holding apparatus 100 for electrostatic holding of component 1, in particular a silicon wafer, includes plate-type base body 10 with plurality of projecting burls 11, the front surfaces 12 of which span a burl support plane for component 1, and electrode device 20 arranged in layered form in spacings between burls 11 and has plastic insulating layer 21 connected with base body 10, electrode layer 22 and dielectric layer 23, whereby electrode layer 22 is arranged between insulating layer 21 and dielectric layer 23, whereby a predetermined gap spacing A is set between the burl support plane and a top side of dielectric layer 23, and dielectric layer 23 includes an inorganic dielectric and is embedded at least in part into insulating layer 21. Methods for producing holding apparatus 100 for electrostatic holding of component 1, in particular a silicon wafer, are also described.
    Type: Grant
    Filed: July 6, 2019
    Date of Patent: July 26, 2022
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Simon Halm, Lars Ziegenhagen
  • Publication number: 20200321233
    Abstract: Holding apparatus 100 for electrostatic holding component 1 (e.g., semiconductor wafer), includes base body 10 with at least one plate 10A, protruding burls 11 on upper side of plate and end faces 12 of which span a burls support plane for supporting component, and electrode device 20 in layered form in spacings between burls and insulator layer 21 which is connected to plate, dielectric layer 23 of inorganic dielectric and electrode layer 22 between insulator and dielectric layers. Between burls support plane and dielectric layer upper side, predetermined gap spacing A is set. Electrode device has openings 24 and is on plate upper side between burls, which protrude therethrough. Insulator layer includes inorganic dielectric and is connected with adhesive 13 to base body upper side between burls. Electrode device is embedded in adhesive. Spacing between burls and electrode device is filled with adhesive. A production method is also described.
    Type: Application
    Filed: March 30, 2020
    Publication date: October 8, 2020
    Inventors: Lars ZIEGENHAGEN, Simon HALM
  • Publication number: 20200013660
    Abstract: Holding apparatus 100 for electrostatic holding of component 1, in particular a silicon wafer, includes plate-type base body 10 with plurality of projecting burls 11, the front surfaces 12 of which span a burl support plane for component 1, and electrode device 20 arranged in layered form in spacings between burls 11 and has plastic insulating layer 21 connected with base body 10, electrode layer 22 and dielectric layer 23, whereby electrode layer 22 is arranged between insulating layer 21 and dielectric layer 23, whereby a predetermined gap spacing A is set between the burl support plane and a top side of dielectric layer 23, and dielectric layer 23 includes an inorganic dielectric and is embedded at least in part into insulating layer 21. Methods for producing holding apparatus 100 for electrostatic holding of component 1, in particular a silicon wafer, are also described.
    Type: Application
    Filed: July 6, 2019
    Publication date: January 9, 2020
    Inventors: Simon HALM, Lars ZIEGENHAGEN