Abstract: Various embodiments of the present disclosure relate to transmitter systems, methods, and instructions for signal predistortion. The transmitter system includes an intermodulation distortion (IMD) filter module configured to filter a detected feedback signal (Yin) to generate a targeted filtered signal (Yout), a digital pre-distortion (DPD) coefficient estimation module configured to update signal generation coefficients based on comparing an input signal (Sin) with the targeted filtered signal (Yout), and a distortion compensation processing module configured to generate a pre-distorted signal (Uout) based on the input signal (Sin) using the updated signal generation coefficients.

Abstract: Various embodiments of the present disclosure relate to transmitter systems, methods, and instructions for signal predistortion.

Abstract: Various embodiments of the present disclosure relate to transmitter systems, methods, and instructions for signal predistortion. The transmitter system includes a primary digital predistortion (DPD) layer and a secondary DPD layer. The primary DPD layer includes a DPD coefficient estimation module configured to update primary signal generation coefficients based on comparing a secondary predistorted signal (Uout) with a detected feedback signal (Yout), and a primary distortion compensation processing module configured to generate a primary predistorted signal (Uout?) based on the secondary predistorted signal (Uout) using the updated primary signal generation coefficients.

Abstract: Various embodiments of the present disclosure relate to transmitter systems, methods, and instructions for signal predistortion. The transmitter system includes an intermodulation distortion (IMD) filter module configured to filter a detected feedback signal (Yin) to generate a targeted filtered signal (Yout), a digital pre-distortion (DPD) coefficient estimation module configured to update signal generation coefficients based on comparing an input signal (Sin) with the targeted filtered signal (Yout), and a distortion compensation processing module configured to generate a pre-distorted signal (Uout) based on the input signal (Sin) using the updated signal generation coefficients.

Abstract: Various embodiments of the present disclosure relate to transmitter systems, methods, and instructions for signal predistortion.

Abstract: A radio frequency (RF) transmitter apparatus and method are provided with dual variable impedance components. Included is at least one RF transmitter with a power amplifier and a filter. Further, a first variable impedance component is in electrical communication between the filter and an antenna port. Also included is a second variable impedance component in electrical communication between the power amplifier and the filter.

Abstract: A radio frequency (RF) transmitter apparatus and method are provided with dual variable impedance components. Included is at least one RF transmitter with a power amplifier and a filter. Further, a first variable impedance component is in electrical communication between the filter and an antenna port. Also included is a second variable impedance component in electrical communication between the power amplifier and the filter.

Abstract: A wireless transmission system supporting at least first and second high-isolation transmission modes. In the first TX mode, first and second incoming data streams are processed independently within first and second TX paths to generate first and second analog outgoing signals for separate transmission via first and second antennas. In the second TX mode, the two incoming data streams are combined to form a combined data stream. First and second versions of the combined data stream are processed by the first and second TX paths to generate two analog signals that are combined for transmission via a single antenna. In the second TX mode, a feedback signal, based on differences between the two analog signals, is used to adjust the relative phase and/or delay of the two versions of the combined signal in the digital domain to reduce phase differences between the two analog signals, thereby increasing signal transmission power.

Abstract: A wireless transmission system supporting at least first and second high-isolation transmission modes. In the first TX mode, first and second incoming data streams are processed independently within first and second TX paths to generate first and second analog outgoing signals for separate transmission via first and second antennas. In the second TX mode, the two incoming data streams are combined to form a combined data stream. First and second versions of the combined data stream are processed by the first and second TX paths to generate two analog signals that are combined for transmission via a single antenna. In the second TX mode, a feedback signal, based on differences between the two analog signals, is used to adjust the relative phase and/or delay of the two versions of the combined signal in the digital domain to reduce phase differences between the two analog signals, thereby increasing signal transmission power.

Abstract: An RF amplifier includes at least one RF amplification stage having an RF input signal and an RF output signal and a power signal circuit with power supply coupled with the amplification stage for providing a power signal to the amplification stage. A bias circuit biases the amplification stage to control its operation. A pulse detection circuit is coupled with the power signal circuit and the bias circuit and detects a voltage from the power signal. The pulse detection circuit analyzes the detected voltage of the power signal and determines if the RF input signal presents a pulsed signal condition or non-pulsed signal condition, and controls the bias circuit for biasing the amplification stage according to the determined condition.

Abstract: An RF amplifier includes at least one RF amplification stage having an RF input signal and an RF output signal and a power signal circuit with power supply coupled with the amplification stage for providing a power signal to the amplification stage. A bias circuit biases the amplification stage to control its operation. A pulse detection circuit is coupled with the power signal circuit and the bias circuit and detects a voltage from the power signal. The pulse detection circuit analyzes the detected voltage of the power signal and determines if the RF input signal presents a pulsed signal condition or non-pulsed signal condition, and controls the bias circuit for biasing the amplification stage according to the determined condition.

Abstract: According to one embodiment, for an amplifier circuit employing feed-forward distortion compensation, phase and amplitude adjusters in the carrier cancellation and error cancellation loops can be continuously and simultaneously controlled to compensate for changes in the operating characteristics of the amplifier circuit. For the carrier cancellation loop, the two signals that are used to generate the error signal are sampled and used to generate control signals for the phase and amplitude adjusters that adjust the signal applied to the main amplifier. For the error cancellation loop, the two signals that are used to generate the output signal are sampled and used to generate control signals for the phase and amplitude adjusters that adjust the signal applied to the error amplifier. In each case, the control signals can be generated in the analog domain using relatively simple measurement circuitry.

Abstract: According to one embodiment, for an amplifier circuit employing feed-forward distortion compensation, phase and amplitude adjusters in the carrier cancellation and error cancellation loops can be continuously and simultaneously controlled to compensate for changes in the operating characteristics of the amplifier circuit. For the carrier cancellation loop, the two signals that are used to generate the error signal are sampled and used to generate control signals for the phase and amplitude adjusters that adjust the signal applied to the main amplifier. For the error cancellation loop, the two signals that are used to generate the output signal are sampled and used to generate control signals for the phase and amplitude adjusters that adjust the signal applied to the error amplifier. In each case, the control signals can be generated in the analog domain using relatively simple measurement circuitry.

Abstract: Temperature compensation of LDMOS devices as are employed in high power amplifiers follows from replacing the voltage source and resistive divider that feed the sensing diode of prior art temperature compensators for transistor amplifiers, with a current source feeding the sensing diode in a manner that is substantially independent of voltage variations which follow from temperature change. Such current variations as result from temperature change, in the circuit of the invention, produce variations in the bias voltage at the gate of the LDMOS power transistor which are many times less than the temperature coefficient of the LDMOS device, in producing virtually error-free temperature compensation.

Abstract: A phase shifter circuit shifts the phase of a voltage varying RF signal at high RF power levels by using a diode arrangement of back to back diode sets connected in series to reduce the change in capacitive reactance of the diode arrangement. The diode arrangement is connected to a phase adjustment port of a phase shifting device which shifts the phase of the RF signal according to the capacitive reactance level at the phase adjustment port. A control circuit for each back to back diode set can be used to provide independent adjustment of each diode set to balance capacitive reactance responses between the diode sets to further reduce the change in capacitive reactance. In certain embodiments, the phase shifter circuit uses a ninely (90) degree hybrid coupler with two phase adjustment ports, a zero (0) degree port and a -90 degree port.

Abstract: In an amplifier apparatus of the type including an RF power transistor output stage, the control circuitry of the invention provides an automatic gain control mode of operation for its power transistor of a first response time and a power limiting mode of operation for its transistor of a second, faster response time, and with the power limiting mode of operation being switched into effect in response to the sensing of the collector current flow of the power transistor beyond a prescribed value.