Patents by Inventor Simon Howell

Simon Howell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Processor array
    Patent number: 7549081
    Abstract: An array of processing elements can incorporate a degree of redundancy. Specifically, the array includes one or more spare, or redundant, rows of array elements, in addition to the number required to implement the intended function or functions of the device. If a defect occurs in one of the processors in the device, then the entire row which includes that defective processor is not used, and is replaced by a spare row.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: June 16, 2009
    Assignee: picoChips Design Limited
    Inventors: William Robbins, Michael Davison, Simon Howell, Anthony Peter John Claydon
  • Graphical user interface for 3-dimensional view of a data collection based on an attribute of the data
    Patent number: 6990637
    Abstract: A three-dimensional (3D) view of a data collection based on an attribute is disclosed. A timeline is provided for displaying files and folders. The timeline may include a focal group that displays detailed information about its contents to the user. Remaining items on the timeline are displayed in less detail and may be positioned to appear further away from the user. A histogram may be provided as part of the view to allow the user to more easily navigate the timeline to find a desired file or folder.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: January 24, 2006
    Assignee: Microsoft Corporation
    Inventors: Colin Ray Anthony, Stéphane St-Michel, Zeke Book Odins-Lucas, Jordan Luther King Schwartz, Richard Malcolm Banks, Marcus Simon Howell Harvey, Charles Cummins, Charles W. Stabb, Mark Richard Ligameri
  • Processor array
    Publication number: 20050257105
    Abstract: An array of processing elements can incorporate a degree of redundancy. Specifically, the array includes one or more spare, or redundant, rows of array elements, in addition to the number required to implement the intended function or functions of the device. If a defect occurs in one of the processors in the device, then the entire row which includes that defective processor is not used, and is replaced by a spare row.
    Type: Application
    Filed: June 27, 2003
    Publication date: November 17, 2005
    Inventors: William Robbins, Michael Davison, Simon Howell, Anthony Claydon