Patents by Inventor Simon J. S. McElrea

Simon J. S. McElrea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9824999
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: November 21, 2017
    Assignee: Invensas Corporation
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, De Ann Eileen Melcher, Marc E. Robinson
  • Publication number: 20160218088
    Abstract: Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.
    Type: Application
    Filed: March 31, 2016
    Publication date: July 28, 2016
    Inventors: Simon J. S. McElrea, Marc E. Robinson, Lawrence Douglas Andrews, JR.
  • Publication number: 20160104689
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Application
    Filed: December 15, 2015
    Publication date: April 14, 2016
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, De Ann Eileen Melcher, Marc E. Robinson
  • Patent number: 9305862
    Abstract: Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: April 5, 2016
    Assignee: Invensas Corporation
    Inventors: Simon J. S. McElrea, Marc E. Robinson, Lawrence Douglas Andrews, Jr.
  • Patent number: 9252116
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: February 2, 2016
    Assignee: Invensas Corporation
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, De Ann Eileen Melcher, Marc E. Robinson
  • Publication number: 20140213020
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Application
    Filed: April 1, 2014
    Publication date: July 31, 2014
    Applicant: Invensas Corporation
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, De Ann Eileen Melcher, Marc E. Robinson
  • Patent number: 8742602
    Abstract: A die assembly includes a die mounted to a support, in which the support has interconnect pedestals formed at bond pads, and the die has interconnect terminals projecting beyond a die edge into corresponding pedestals. Also, a support has interconnect pedestals. Also, a method for electrically interconnecting a die to a support includes providing a support having interconnect pedestals formed at bond pads on the die mount surface of the support, providing a die having interconnect terminals projecting beyond a die edge, positioning the die in relation to the support such that the terminals are aligned with the corresponding pedestals, and moving the die and the support toward one another so that the terminals contact the respective pedestals.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: June 3, 2014
    Assignee: Invensas Corporation
    Inventors: Terrence Caskey, Lawrence Douglas Andrews, Jr., Scott McGrath, Simon J. S. McElrea, Yong Du, Mark Scott
  • Patent number: 8723332
    Abstract: In die stack assembly configurations successive die in the stack are offset at a die edge at which die pads are situated, and the die are interconnected by electrically conductive traces. In some embodiments the electrically conductive traces are formed of an electrically conductive polymer. An electrically insulative conformal coating is provided having openings at die pads that are electrically connected.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: May 13, 2014
    Assignee: Invensas Corporation
    Inventors: Simon J. S. McElrea, Lawrence Douglas Andrews, Jr., Scott McGrath, Terrence Caskey, Scott Jay Crane, Marc E. Robinson, Loreto Cantillep
  • Patent number: 8704379
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a conformal coating between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on either or both a die attach area of a surface of the die, or a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: April 22, 2014
    Assignee: Invensas Corporation
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, DeAnn Eileen Melcher, Marc E. Robinson
  • Patent number: 8680687
    Abstract: A die (or of a stack of die) is mounted over and elevated above a support, and is electrically connected to circuitry in the support. Pillars of electrically conductive material are formed on a set of bond pads at a mount side of the support, and the elevated die (or at least one die in the elevated stack of die) is electrically connected to the support, by traces of an electrically conductive material contacting interconnect pads on the die to the pillars, and through the pillars to the support. Also, tiered offset stacked die assemblies in a zig-zag configuration, in which the interconnect edges of a first (lower) tier face in a first direction, and the interconnect edges of a second (upper) tier, stacked over the first tier, face in a second direction, different from the first direction, are electrically connected to a support.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: March 25, 2014
    Assignee: Invensas Corporation
    Inventors: Reynaldo Co, Grant Villavicencio, Jeffrey S. Leal, Simon J. S. McElrea
  • Patent number: 8629543
    Abstract: In die stack assembly configurations successive die in the stack are offset at a die edge at which die pads are situated, and the die are interconnected by electrically conductive traces. In some embodiments the electrically conductive traces are formed of an electrically conductive polymer. An electrically insulative conformal coating is provided having openings at die pads that are electrically connected.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: January 14, 2014
    Assignee: Invensas Corporation
    Inventors: Simon J. S. McElrea, Lawrence Douglas Andrews, Jr., Scott McGrath, Terrence Caskey, Scott Jay Crane, Marc E. Robinson, Loreto Cantillep
  • Publication number: 20130099392
    Abstract: Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.
    Type: Application
    Filed: April 25, 2012
    Publication date: April 25, 2013
    Applicant: VERTICAL CIRCUITS, INC.
    Inventors: Simon J. S. McElrea, Marc E. Robinson, Lawrence Douglas Andrews, JR.
  • Patent number: 8324081
    Abstract: An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: December 4, 2012
    Inventors: Simon J. S. McElrea, Terrence Caskey, Scott McGrath, DeAnn Eileen Melcher, Reynaldo Co, Lawrence Douglas Andrews, Jr., Weiping Pan, Grant Villavicencio, Yong Du, Scott Jay Crane, Zongrong Liu
  • Patent number: 8178978
    Abstract: Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: May 15, 2012
    Assignee: Vertical Circuits, Inc.
    Inventors: Simon J. S. McElrea, Marc E. Robinson, Lawrence Douglas Andrews, Jr.
  • Patent number: 8159053
    Abstract: A flat leadless package includes at least one die mounted onto a leadframe and electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, an assembly includes stacked leadless packages electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, a package module includes an assembly of stacked leadless packages mounted on a support and electrically connected to circuitry in the support using an electrically conductive polymer or an electrically conductive ink.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: April 17, 2012
    Assignee: Vertical Circuits, Inc.
    Inventors: Lawrence Douglas Andrews, Jr., Jeffrey S. Leal, Simon J. S. McElrea
  • Publication number: 20110272825
    Abstract: Methods are disclosed for improving electrical interconnection in stacked die assemblies, and stacked die assemblies are disclosed having structural features formed by the methods. The resulting stacked die assemblies are characterized by having reduced electrical interconnect failure.
    Type: Application
    Filed: November 4, 2010
    Publication date: November 10, 2011
    Applicant: Vertical Circuits, Inc.
    Inventors: Scott McGrath, Jeffrey S. Leal, Ravi Shenoy, Loreto Cantillep, Simon J. S. McElrea, Suzette K. Pangrle
  • Publication number: 20110147943
    Abstract: An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).
    Type: Application
    Filed: March 4, 2011
    Publication date: June 23, 2011
    Applicant: Vertical Circuits, Inc.
    Inventors: Simon J. S. McElrea, Terrence Caskey, Scott McGrath, DeAnn Eileen Melcher, Reynaldo Co, Lawrence Douglas Andrews, JR., Weiping Pan, Grant Villavicencio, Yong Du, Scott Jay Crane, Zongrong Liu
  • Patent number: 7923349
    Abstract: An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: April 12, 2011
    Assignee: Vertical Circuits, Inc.
    Inventors: Simon J. S. McElrea, Terrence Caskey, Scott McGrath, DeAnn Eileen Melcher, Reynaldo Co, Lawrence Douglas Andrews, Jr., Weiping Pan, Grant Villavicencio, Yong Du, Scott Jay Crane, Zongrong Liu
  • Publication number: 20110037159
    Abstract: In die stack assembly configurations successive die in the stack are offset at a die edge at which die pads are situated, and the die are interconnected by electrically conductive traces. In some embodiments the electrically conductive traces are formed of an electrically conductive polymer. An electrically insulative conformal coating is provided having openings at die pads that are electrically connected.
    Type: Application
    Filed: October 27, 2010
    Publication date: February 17, 2011
    Applicant: Vertical Circuits, Inc.
    Inventors: Simon J. S. McElrea, Lawrence Douglas Andrews, JR., Scott McGrath, Terrence Caskey, Scott Jay Crane, Marc E. Robinson, Loreto Cantillep
  • Publication number: 20110012246
    Abstract: A flat leadless package includes at least one die mounted onto a leadframe and electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, an assembly includes stacked leadless packages electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, a package module includes an assembly of stacked leadless packages mounted on a support and electrically connected to circuitry in the support using an electrically conductive polymer or an electrically conductive ink.
    Type: Application
    Filed: September 28, 2010
    Publication date: January 20, 2011
    Applicant: Vertical Circuits, Inc.
    Inventors: Lawrence Douglas Andrews, JR., Jeffrey S. Leal, Simon J.S. McElrea