Patents by Inventor Simon Joshua Waters
Simon Joshua Waters has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8522197Abstract: A design tool hierarchically presents information about a design with nested blocks. For example, the design tool presents scheduling information for the design in a hierarchical Gantt chart. The scheduling information includes hierarchical design schedule blocks which accurately depict the timing and scheduling of the nested blocks of the design. Each of the hierarchical design schedule blocks includes control steps numbered relative to the block. The scheduling information also includes a hierarchical list of scheduled operations for the design. The hierarchical list emphasizes which operations are associated with which nested blocks. The scheduling information further includes pseudo-operation icons that are easily differentiated from real operation icons in the hierarchical Gantt chart.Type: GrantFiled: November 30, 2010Date of Patent: August 27, 2013Assignee: Mentor Graphics CorporationInventors: Peter Pius Gutberlet, Simon Joshua Waters, Bryan Darrell Bowyer
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Patent number: 8205175Abstract: An algorithmic programming language approach to system design enables design, synthesis, and validation of structured, system-level specifications, and integrates system-level design into the rest of the design process. The algorithmic programming language design approach includes various techniques and tools, which can be used in combination or independently. For example, the design approach includes techniques and tools for simplifying specification of a design unit interface in a programming language specification and/or simplifying specification of synchronization and sub-design unit concurrency for a design unit. According to a first aspect of the design approach, design occurs at the algorithmic level of abstraction. According to a second aspect, the design approach leverages existing simulation technology for validation at various stages of the design flow.Type: GrantFiled: October 23, 2007Date of Patent: June 19, 2012Assignee: Calypto Design Systems, Inc.Inventors: Simon Joshua Waters, Peter Pius Gutberlet, Andres Rafael Takach
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Publication number: 20110138348Abstract: A design tool hierarchically presents information about a design with nested blocks. For example, the design tool presents scheduling information for the design in a hierarchical Gantt chart. The scheduling information includes hierarchical design schedule blocks which accurately depict the timing and scheduling of the nested blocks of the design. Each of the hierarchical design schedule blocks includes control steps numbered relative to the block. The scheduling information also includes a hierarchical list of scheduled operations for the design. The hierarchical list emphasizes which operations are associated with which nested blocks. The scheduling information further includes pseudo-operation icons that are easily differentiated from real operation icons in the hierarchical Gantt chart.Type: ApplicationFiled: November 30, 2010Publication date: June 9, 2011Inventors: Peter Pius Gutberlet, Simon Joshua Waters, Bryan Darrell Bowyer
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Patent number: 7844944Abstract: A design tool hierarchically presents information about a design with nested blocks. For example, the design tool presents scheduling information for the design in a hierarchical Gantt chart. The scheduling information includes hierarchical design schedule blocks which accurately depict the timing and scheduling of the nested blocks of the design. Each of the hierarchical design schedule blocks includes control steps numbered relative to the block. The scheduling information also includes a hierarchical list of scheduled operations for the design. The hierarchical list emphasizes which operations are associated with which nested blocks. The scheduling information further includes pseudo-operation icons that are easily differentiated from real operation icons in the hierarchical Gantt chart.Type: GrantFiled: September 8, 2006Date of Patent: November 30, 2010Assignee: Mentor Graphics CorporationInventors: Peter Pius Gutberlet, Simon Joshua Waters, Bryan Darrell Bowyer
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Patent number: 7831938Abstract: A behavioral synthesis tool that allows a designer to design an integrated circuit using a generic programming language, such as ANSI C or C++, without the need to include timing information into the source code. In one aspect, the source code is read into the behavioral synthesis tool and the user may dynamically allocate interface resources to the design. In another aspect, the dynamic allocation is accomplished through user input, such as a GUI, a command line, or a file. In another aspect, the behavioral synthesis tool automatically analyzes variables in the source code description and assigns the variables to interface resources. In yet another aspect, the variables and interface resources associated with the variables may be displayed in a hierarchical format in a GUI. In still another aspect, the GUI may allow for expanding and collapsing of different layers in the hierarchy. The GUI may also allow for drag-and-drop operations for modifying the allocation of variables to interface resources.Type: GrantFiled: November 21, 2007Date of Patent: November 9, 2010Assignee: Mentor Graphics CorporationInventors: Bryan Darrell Bowyer, Peter Pius Gutberlet, Simon Joshua Waters
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Patent number: 7712050Abstract: A design tool hierarchically presents information about a design with nested blocks. For example, the design tool presents scheduling information for the design in a hierarchical Gantt chart. The scheduling information includes hierarchical design schedule blocks which accurately depict the timing and scheduling of the nested blocks of the design. Each of the hierarchical design schedule blocks includes control steps numbered relative to the block. The scheduling information also includes a hierarchical list of scheduled operations for the design. The hierarchical list emphasizes which operations are associated with which nested blocks. The scheduling information further includes pseudo-operation icons that are easily differentiated from real operation icons in the hierarchical Gantt chart.Type: GrantFiled: September 8, 2006Date of Patent: May 4, 2010Inventors: Peter Pius Gutberlet, Simon Joshua Waters, Bryan Darrell Bowyer
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Publication number: 20090132979Abstract: Disclosed herein are embodiments of methods and apparatus for handling dynamic pointers during algorithmic synthesis. In one disclosed embodiment, a high-level description of a circuit design (e.g., C++ description or a parsed C++ description) is received. In this embodiment, the high-level description comprises one or more dynamic pointer dereferencing operations. The high-level description of the circuit is converted into an RTL description or a gate-level netlist. In this embodiment, the RTL description or the gate-level netlist describes hardware capable of implementing the dynamic pointer dereferencing operations. The hardware can comprise, for instance, one or more multiplexers and/or one or more demultiplexers.Type: ApplicationFiled: November 19, 2008Publication date: May 21, 2009Inventors: Simon Joshua Waters, Peter Pius Gutberlet
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Publication number: 20080141227Abstract: An algorithmic programming language approach to system design enables design, synthesis, and validation of structured, system-level specifications, and integrates system-level design into the rest of the design process. The algorithmic programming language design approach includes various techniques and tools, which can be used in combination or independently. For example, the design approach includes techniques and tools for simplifying specification of a design unit interface in a programming language specification and/or simplifying specification of synchronization and sub-design unit concurrency for a design unit. According to a first aspect of the design approach, design occurs at the algorithmic level of abstraction. According to a second aspect, the design approach leverages existing simulation technology for validation at various stages of the design flow.Type: ApplicationFiled: October 23, 2007Publication date: June 12, 2008Inventors: Simon Joshua Waters, Peter Pius Gutberlet, Andres Rafael Takach
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Patent number: 7308672Abstract: An algorithmic programming language approach to system design enables design, synthesis, and validation of structured, system-level specifications, and integrates system-level design into the rest of the design process. The algorithmic programming language design approach includes various techniques and tools, which can be used in combination or independently. For example, the design approach includes techniques and tools for simplifying specification of a design unit interface in a programming language specification and/or simplifying specification of synchronization and sub-design unit concurrency for a design unit. According to a first aspect of the design approach, design occurs at the algorithmic level of abstraction. According to a second aspect, the design approach leverages existing simulation technology for validation at various stages of the design flow.Type: GrantFiled: January 5, 2004Date of Patent: December 11, 2007Inventors: Simon Joshua Waters, Peter Pius Gutberlet, Andres Rafael Takach
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Patent number: 7302670Abstract: A behavioral synthesis tool that allows a designer to design an integrated circuit using a generic programming language, such as ANSI C or C++, without the need to include timing information into the source code. In one aspect, the source code is read into the behavioral synthesis tool and the user may dynamically allocate interface resources to the design. In another aspect, the dynamic allocation is accomplished through user input, such as a GUI, a command line, or a file. In another aspect, the behavioral synthesis tool automatically analyzes variables in the source code description and assigns the variables to interface resources. In yet another aspect, the variables and interface resources associated with the variables may be displayed in a hierarchical format in a GUI. In still another aspect, the GUI may allow for expanding and collapsing of different layers in the hierarchy. The GUI may also allow for drag-and-drop operations for modifying the allocation of variables to interface resources.Type: GrantFiled: December 5, 2002Date of Patent: November 27, 2007Inventors: Bryan Darrell Bowyer, Peter Pius Gutberlet, Simon Joshua Waters
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Patent number: 7120879Abstract: A design tool hierarchically presents information about a design with nested blocks. For example, the design tool presents scheduling information for the design in a hierarchical Gantt chart. The scheduling information includes hierarchical design schedule blocks which accurately depict the timing and scheduling of the nested blocks of the design. Each of the hierarchical design schedule blocks includes control steps numbered relative to the block. The scheduling information also includes a hierarchical list of scheduled operations for the design. The hierarchical list emphasizes which operations are associated with which nested blocks. The scheduling information further includes pseudo-operation icons that are easily differentiated from real operation icons in the hierarchical Gantt chart.Type: GrantFiled: July 31, 2001Date of Patent: October 10, 2006Inventors: Peter Pius Gutberlet, Simon Joshua Waters, Bryan Darrell Bowyer
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Publication number: 20040143801Abstract: An algorithmic programming language approach to system design enables design, synthesis, and validation of structured, system-level specifications, and integrates system-level design into the rest of the design process. The algorithmic programming language design approach includes various techniques and tools, which can be used in combination or independently. For example, the design approach includes techniques and tools for simplifying specification of a design unit interface in a programming language specification and/or simplifying specification of synchronization and sub-design unit concurrency for a design unit. According to a first aspect of the design approach, design occurs at the algorithmic level of abstraction. According to a second aspect, the design approach leverages existing simulation technology for validation at various stages of the design flow.Type: ApplicationFiled: January 5, 2004Publication date: July 22, 2004Inventors: Simon Joshua Waters, Peter Pius Gutberiet, Andres Rafael Takach
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Publication number: 20040111692Abstract: A behavioral synthesis tool that allows a designer to design an integrated circuit using a generic programming language, such as ANSI C or C++, without the need to include timing information into the source code. In one aspect, the source code is read into the behavioral synthesis tool and the user may dynamically allocate interface resources to the design. In another aspect, the dynamic allocation is accomplished through user input, such as a GUI, a command line, or a file. In another aspect, the behavioral synthesis tool automatically analyzes variables in the source code description and assigns the variables to interface resources. In yet another aspect, the variables and interface resources associated with the variables may be displayed in a hierarchical format in a GUI. In still another aspect, the GUI may allow for expanding and collapsing of different layers in the hierarchy. The GUI may also allow for drag-and-drop operations for modifying the allocation of variables to interface resources.Type: ApplicationFiled: December 5, 2002Publication date: June 10, 2004Applicant: Mentor Graphics Corp.Inventors: Bryan Darrell Bowyer, Peter Pius Gutberlet, Simon Joshua Waters
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Patent number: 6701501Abstract: An algorithmic programming language approach to system design enables design, synthesis, and validation of structured, system-level specifications, and integrates system-level design into the rest of the design process. The algorithmic programming language design approach includes various techniques and tools, which can be used in combination or independently. For example, the design approach includes techniques and tools for simplifying specification of a design unit interface in a programming language specification and/or simplifying specification of synchronization and sub-design unit concurrency for a design unit. According to a first aspect of the design approach, design occurs at the algorithmic level of abstraction. According to a second aspect, the design approach leverages existing simulation technology for validation at various stages of the design flow.Type: GrantFiled: September 18, 2001Date of Patent: March 2, 2004Inventors: Simon Joshua Waters, Peter Pius Gutberlet, Andres Rafael Takach
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Publication number: 20030033039Abstract: A design tool hierarchically presents information about a design with nested blocks. For example, the design tool presents scheduling information for the design in a hierarchical Gantt chart. The scheduling information includes hierarchical design schedule blocks which accurately depict the timing and scheduling of the nested blocks of the design. Each of the hierarchical design schedule blocks includes control steps numbered relative to the block. The scheduling information also includes a hierarchical list of scheduled operations for the design. The hierarchical list emphasizes which operations are associated with which nested blocks. The scheduling information further includes pseudo-operation icons that are easily differentiated from real operation icons in the hierarchical Gantt chart.Type: ApplicationFiled: July 31, 2001Publication date: February 13, 2003Applicant: Mentor Graphics CorporationInventors: Peter Pius Gutberlet, Simon Joshua Waters, Bryan Darrell Bowyer
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Publication number: 20020133788Abstract: An algorithmic programming language approach to system design enables design, synthesis, and validation of structured, system-level specifications, and integrates system-level design into the rest of the design process. The algorithmic programming language design approach includes various techniques and tools, which can be used in combination or independently. For example, the design approach includes techniques and tools for simplifying specification of a design unit interface in a programming language specification and/or simplifying specification of synchronization and sub-design unit concurrency for a design unit. According to a first aspect of the design approach, design occurs at the algorithmic level of abstraction. According to a second aspect, the design approach leverages existing simulation technology for validation at various stages of the design flow.Type: ApplicationFiled: September 18, 2001Publication date: September 19, 2002Inventors: Simon Joshua Waters, Peter Pius Gutberlet, Andres Rafael Takach