Patents by Inventor Simon Ogier
Simon Ogier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260107609Abstract: A method of fabricating a micro-LED display (300), the method comprising: providing (102) a micro-LED wafer (302) comprising an array of LEDs (304) deposited on a growth substrate (306); depositing (110) an adhesion layer (308) so as to cover the micro-LED wafer (302) while leaving one or more selected LEDs exposed; depositing (112) a backplane (310) on the adhesion layer (308), such that the backplane (310) is aligned with and operatively connected to the exposed one or more LEDs; and removing (114) the deposited backplane (310) and connected one or more LEDs to a display substrate (312).Type: ApplicationFiled: September 25, 2023Publication date: April 16, 2026Applicant: SmartKem LimitedInventor: Simon OGIER
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Publication number: 20240008294Abstract: The present invention relates to an organic thin film transistor (OTFT) comprising an organic semiconductor layer (2) arranged between a source terminal (3) and a drain terminal (4). The OTFT further includes a front gate (5) electrode arranged on one side of the organic semiconductor layer and a back gate electrode (6) arranged on the opposite side of the organic semiconductor layer. The front and back gate electrodes are arranged to control the current flow in the organic semiconductor layer upon application of a voltage and the back gate electrode is electrically connected to one of: the front gate electrode and the source terminal. OTFT's according to the present invention, with a connection between the back gate and the source or front gate, exhibit improved turn on voltage stability, lower power consumption and improved bias stress stability compared to single gate and back gate isolated OTFTs.Type: ApplicationFiled: November 16, 2021Publication date: January 4, 2024Applicant: SMARTKEM LIMITEDInventors: Beverley BROWN, Chia-Hung TSAI, Dan SHARKEY, Alejandro CARRERAS, Simon OGIER
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Patent number: 10090482Abstract: This invention comprises a field effect transistor which comprises source and drain electrodes (01) which are bridged by a semiconductor which comprises semiconducting crystallites, the conductivity of the semiconductor being controlled by a gate electrode (02) which is insulated from the semiconductor and the source and drain electrodes, to which a potential is applied for controlling the conductivity of the semiconductor, in which at least part of the facing surfaces of the source and drain electrodes are geometrically formed such that they provide current flow of different directions between the electrodes through the said channel. By this means current is caused to flow through more orientations of the crystals resulting in greater uniformity of performance between different transistors when there is a degree of variable crystallographic orientation.Type: GrantFiled: April 20, 2012Date of Patent: October 2, 2018Assignee: CPI Innovation Services LimitedInventors: Simon Ogier, Marco Palumbo
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Publication number: 20140097426Abstract: This invention comprises a field effect transistor which comprises source and drain electrodes (01) which are bridged by a semiconductor which comprises semiconducting crystallites, the conductivity of the semiconductor being controlled by a gate electrode (02) which is insulated from the semiconductor and the source and drain electrodes, to which a potential is applied for controlling the conductivity of the semiconductor, in which at least part of the facing surfaces of the source and drain electrodes are geometrically formed such that they provide current flow of different directions between the electrodes through the said channel. By this means current is caused to flow through more orientations of the crystals resulting in greater uniformity of performance between different transistors when there is a degree of variable crystallographic orientation.Type: ApplicationFiled: April 20, 2012Publication date: April 10, 2014Applicant: CPI Innovation Services LimitedInventors: Simon Ogier, Marco Palumbo
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Publication number: 20080009625Abstract: An organic semiconducting layer formulation, which comprises: an organic binder which has a permittivity, ?, at 1,000 Hz of 3.Type: ApplicationFiled: July 9, 2007Publication date: January 10, 2008Inventors: Beverley Brown, Janos Veres, Remi Anemian, Richard Williams, Simon Ogier, Stephen Leeming
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Publication number: 20070259477Abstract: The present invention relates to a process for reducing the mobility of an semiconductor (OSC) layer in an electronic device, which has a semiconducting channel area, in specific areas outside said channel area by applying an oxidzing agent to the OSC layer.Type: ApplicationFiled: October 4, 2005Publication date: November 8, 2007Inventors: Beverley Brown, Janos Veres, Simon Ogier
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Publication number: 20070137520Abstract: An organic semiconducting layer formulation, which comprises: an organic binder which has a permittivity, ?, at 1,000 Hz of 3.Type: ApplicationFiled: February 6, 2007Publication date: June 21, 2007Inventors: Beverley Brown, Janos Veres, Remi Anemian, Richard Williams, Simon Ogier, Stephen Leeming
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Publication number: 20070102696Abstract: An organic semiconducting layer formulation, which comprises: an organic binder which has a permittivity, ?, at 1,000 Hz of 3.Type: ApplicationFiled: November 25, 2004Publication date: May 10, 2007Inventors: Beverley Brown, Janos Veres, Remi Anemian, Richard Williams, Simon Ogier, Stephen Leeming
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Publication number: 20060238117Abstract: This invention relates to organic light emitting diodes (OLEDs) and to methods for their manufacture. The invention provides an OLED element or display which enables contrast to be produced in an image. In accordance with the invention a layer of ink is patterned as a blocking layer between two OLED layers. The ink reduces or prevents conduction, i.e. movement of charge, between the two OLED layers in that area of the device. The ink may be dark in colour, e.g. black, to increase the contrast ratio of the OLED. The blocking layer is provided between any two layers in the OLED and blocks the charge movement in these areas. The blocking layer may comprise a multiplicity of ink dots, the density of which determines the extent to which conduction is hindered. The blocking layer may be produced as a “grey-scale” pattern wherein the density of dots is varied across the pattern.Type: ApplicationFiled: July 30, 2003Publication date: October 26, 2006Inventors: Janos Veres, Simon Ogier, Stephen Yeates
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Publication number: 20060155040Abstract: A composition for use as an organic semiconducting (OSC) material, the composition comprising: (i) at least one higher molecular weight organic semiconducting compound having a number average molecular weight (Mn) of at least 5000, and (ii) at least one lower molecular weight organic semiconducting compound having a number average molecular weight (Mn) of 1000 or less. Use of the composition in an electronic device, e.g. FET or OLED.Type: ApplicationFiled: December 18, 2003Publication date: July 13, 2006Inventors: Janos Veres, Paul Brookes, Richard Williams, Simon Ogier, Soad Mohlaldin-Khaffaf, Stephen Leeming
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Publication number: 20060105492Abstract: A method for forming an organic electronic device, which method comprises the steps of: a) forming a negative image of a desired pattern on a substrate or device layer with a lift-off ink; b) coating a first device layer to be patterned on top of the negative image; c) coating one or more further device layers to be patterned on top of the first device layer to be patterned; and d) removing the lift-off ink and unwanted portions of the device layers above it, thereby leaving the desired pattern of device layers. The method allows the formation of a device structure wherein the device layers to be patterned are self-aligned. The method enables a multiplicity of layers to be patterned in a single set of printing and lift-off steps using one pattern which ensures the excellent vertical alignment of edges, which would be difficult to achieve by direct printing. Horizontal alignment can also be achieved. The size of the device features can be reduced below the actual printing resolution.Type: ApplicationFiled: July 30, 2003Publication date: May 18, 2006Inventors: Janos Veres, Simon Ogier, Stephen Yeates
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Publication number: 20050104058Abstract: A process of manufacturing an organic field effect device is provided comprising the steps of (a) depositing from a solution an organic semiconductor layer; and (b) depositing from a solution a layer of low permittivity insulating material forming at least a part of a gate insulator, such that the low permittivity insulating material is in contact with the organic semiconductor layer, wherein the low permittivity insulating material is of relative permittivity from 1.1 to below 3.0. In addition, an organic field effect device manufactured by the process is provided.Type: ApplicationFiled: November 21, 2002Publication date: May 19, 2005Inventors: Janos Veres, Simon Ogier, Soad Mohialdin-Khaffaf, Stephen Leeming