Patents by Inventor Simon Peter Tsaoussis

Simon Peter Tsaoussis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Two transistor ternary random access memory
    Patent number: 9704555
    Abstract: A two transistor ternary random access memory (TTTRAM) circuit includes an voltage/current input, an input/output switch, a first transistor, a first pull up resistor, a second transistor, and a second pull up resistor. The first transistor has a first emitter, a first collector connected to the input/output switch, and a first base. The first pull up resistor is connected to the first emitter and the voltage/current input. The second transistor has a second emitter connected to ground, a second collector, and a second base connected to the input/output switch. The second pull up resistor is connected to the first base, the second collector, and the voltage/current input.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: July 11, 2017
    Assignee: Rangel, Tsaoussis and Technologies LLC
    Inventor: Simon Peter Tsaoussis
  • Two Transistor Ternary Random Access Memory
    Publication number: 20160189762
    Abstract: A two transistor ternary random access memory (TTTRAM) circuit includes an voltage/current input, an input/output switch, a first transistor, a first pull up resistor, a second transistor, and a second pull up resistor. The first transistor has a first emitter, a first collector connected to the input/output switch, and a first base. The first pull up resistor is connected to the first emitter and the voltage/current input. The second transistor has a second emitter connected to ground, a second collector, and a second base connected to the input/output switch. The second pull up resistor is connected to the first base, the second collector, and the voltage/current input.
    Type: Application
    Filed: December 30, 2015
    Publication date: June 30, 2016
    Inventor: Simon Peter Tsaoussis
  • Two transistor ternary random access memory
    Patent number: 9269422
    Abstract: A two transistor ternary random access memory (TTTRAM) circuit includes an voltage/current input, an input/output switch, a first transistor, a first pull up resistor, a second transistor, and a second pull up resistor. The first transistor has a first emitter, a first collector connected to the input/output switch, and a first base. The first pull up resistor is connected to the first emitter and the voltage/current input. The second transistor has a second emitter connected to ground, a second collector, and a second base connected to the input/output switch. The second pull up resistor is connected to the first base, the second collector, and the voltage/current input.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: February 23, 2016
    Inventor: Simon Peter Tsaoussis
  • Two Transistor Ternary Random Access Memory
    Publication number: 20150092485
    Abstract: A two transistor ternary random access memory (TTTRAM) circuit includes an voltage/current input, an input/output switch, a first transistor, a first pull up resistor, a second transistor, and a second pull up resistor. The first transistor has a first emitter, a first collector connected to the input/output switch, and a first base. The first pull up resistor is connected to the first emitter and the voltage/current input. The second transistor has a second emitter connected to ground, a second collector, and a second base connected to the input/output switch. The second pull up resistor is connected to the first base, the second collector, and the voltage/current input.
    Type: Application
    Filed: September 29, 2014
    Publication date: April 2, 2015
    Inventor: Simon Peter Tsaoussis