Patents by Inventor Simon Reiss

Simon Reiss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260141738
    Abstract: The invention relates to a computer implemented method for training a machine learning model for semantic image segmentation, the method comprising: obtaining training images collectively containing at least three different types of annotations, and training the machine learning model using a loss function, wherein the formulation of the loss function at at least one pixel depends on the types of annotations at the pixel and on the types of annotations within each batch. The invention also relates to a computer implemented method for semantic segmentation making use of the trained machine learning model, and to corresponding systems, computer programs and computer readable media.
    Type: Application
    Filed: October 23, 2025
    Publication date: May 21, 2026
    Inventors: Simon Reiss, Alexander Freytag, Rainer Stiefelhagen, Constantin Seibold
  • Patent number: 11373936
    Abstract: A flat no-leads package, the flat no-leads package includes a leadframe for electrically connecting an integrated circuit (IC) chip which in a mounted configuration is arranged in a center portion of the flat no-leads package. The leadframe has at least one RF lead pin; and an isolating encapsulation which is at least partially encapsulating the leadframe such that contact surfaces of the leadframe are electrically contactable at least from a bottom side of the flat no-leads package; wherein at least one of the RF lead pin has a first and second contact surfaces. A cross-section of the RF lead pin increases from the first contact surface to the second contact surface both in a horizontal direction and in a direction vertical thereto. Further, a printed circuit board having a flat no-leads package and a measurement device having a flat no-leads package are provided.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: June 28, 2022
    Assignee: ROHDE & SCHWARZ GMBH & CO. KG
    Inventors: Simon Reiss, Chris Haehnlein, Robert Ziegler
  • Publication number: 20210151363
    Abstract: A flat no-leads package, the flat no-leads package includes a leadframe for electrically connecting an integrated circuit (IC) chip which in a mounted configuration is arranged in a center portion of the flat no-leads package, The leadframe has at least one RF lead pin; and an isolating encapsulation which is at least partially encapsulating the leadframe such that contact surfaces of the leadframe are electrically contactable at least from a bottom side of the flat no-leads package; wherein at least one of the RF lead pin has a first and second contact surfaces. A cross-section of the RF lead pin increases from the first contact surface to the second contact surface both in a horizontal direction and in a direction vertical thereto. Further, a printed circuit board having a flat no-leads package and a measurement device having a flat no-leads package are provided.
    Type: Application
    Filed: November 14, 2019
    Publication date: May 20, 2021
    Inventors: Simon Reiss, Chris Haehnlein, Robert Ziegler