Abstract: An article of manufacture comprises: at least a portion of a wafer comprising a substrate and one or more layers fabricated on the substrate; one or more integrated photonic structures in the portion of the wafer, where at least a first integrated photonic structure of the one or more integrated photonic structures is associated with an electromagnetic wave propagation region that extends beyond a first surface of a first layer of the one or more layers; an array of liquid guiding structures arranged in a two-dimensional pattern on a portion of the first surface of the first layer; and an adhesive material making contact with the first surface of the first layer and with at least a majority of the liquid guiding structures in the array of liquid guiding structures.

Abstract: An apparatus comprises: an interposer chip (IC) having a first layer with a first plurality of optical waveguiding structures (OWSs), where the first layer is below a surface of the IC substantially coplanar with a first plane; a device chip (DC) having a second layer with a second plurality of OWSs, where the second layer is below a surface of the DC substantially coplanar with a second plane; and a chip connection arrangement between the IC and the DC forming a nonzero angle between the first and second planes, where the chip connection arrangement comprises at least one optical coupling arrangement comprising a first cutout in the IC extending below the surface, and exposing an end of a first OWS, and a first protrusion extending from a portion of the DC, containing a portion of a bend in a second OWS, and exposing an end of the second OWS.

Abstract: In one aspect, in general, an apparatus comprises: a die having a surface over which one or more metal contacts are arranged and over which one or more contact-sensitive structures are arranged; a plurality of conductive separating structures, each of the conductive separating structures (1) comprising two or more stud bumps, and (2) having a first stud bump of the two or more stud bumps in contact with at least one of the one or more metal contacts; a conductive paste coating a portion of each of the conductive separating structures including at least a portion of a second stud bump of the two or more stud bumps; and a substrate abutting the conductive paste at an end of the second stud bump.

Abstract: An apparatus for securing a semiconductor wafer portion (SWP) comprises: a first rotatable structure (RS) configured to perform a first rotation and a first counterrotation about a first axis; a second RS configured to perform a second rotation and a second counterrotation about a second axis; a first set of one or more adjustable adhesive regions (AARs) located on the first RS and in contact with the SWP, where each AAR in the first set of AARs is configured to increase its adhesion to the SWP during the first rotation and to decrease its adhesion during the first counterrotation; and a second set of one or more AARs located on the second RS and in contact with the SWP, where each AAR in the second set of AARs is configured to increase its adhesion to the SWP during the second rotation and decrease its adhesion during the second counterrotation.

Abstract: A first photonic integrated circuit (PIC) comprises a first optical element optically coupled to a first coupling region at an edge of the first PIC. A second PIC is formed in part from a multilayer structure comprising a bottom layer, a top layer comprising a first material with a first index of refraction, and a middle layer comprising a second material with a second lower index of refraction and having a first thickness between the bottom and top layers. The second PIC comprises a plurality of vertical alignment pedestals comprising a portion of the middle layer having the first thickness and attached to at least a portion of the bottom layer, a plurality of thinned regions, and a second optical element optically coupled to a second coupling region at an edge of the second PIC. Two or more of the vertical alignment pedestals are adhered to the first PIC.

Abstract: An article of manufacture comprises: at least a portion of a wafer comprising a substate and one or more layers fabricated on the substrate; one or more integrated photonic structures in the portion of the wafer, where at least a first integrated photonic structure of the one or more integrated photonic structures is associated with an electromagnetic wave propagation region that extends beyond a first surface of a first layer of the one or more layers; an array of structures arranged in a two-dimensional pattern on a portion of the first surface; and an adhesive material making contact with the first surface and with at least a majority of the structures in the array of structures.

Abstract: A stress compensating pick-up tool for aligning a companion chip with a host chip includes a tool tip and an actuator. The tool tip holds the companion chip, and includes a first tip portion and a second tip portion. The actuator applies a force to the tool tip, wherein the force causes the first tip portion and the second tip portion to rotate in opposite directions with respect to one another to optically align a portion of the companion chip with a corresponding portion of the host chip.

Abstract: In one aspect, in general, a method for placing a chip for device manufacturing comprises: picking up the chip with a component placement tool comprises a tool surface; spatially translating the component placement tool and the chip along a direction substantially perpendicular to a plane defined by a reference surface, the spatially translating comprising beginning the spatially translating at a first spatial coordinate with respect to the direction, and ending the spatially translating when contact between the reference surface and the tool surface is detected by a sensor at a second spatial coordinate with respect to the direction; and in response to detecting the contact, releasing the chip from the component placement tool and onto a portion of a device assembly in proximity to the second spatial coordinate with respect to the direction.

Abstract: An apparatus for securing a wafer, the wafer having a first side comprising a plurality of fabricated structure regions and a second side that has at least one region that is exposed for fabrication when the wafer is secured, comprises: a carrier base configured to receive the wafer, the carrier base comprising one or more alignment features for aligning the wafer to the carrier base; and a plurality of support structures arranged on the carrier base. Three or more of the support structures are each configured to contact the first side of the wafer when the wafer is secured to the carrier base, and arranged on the carrier base to contact the first side of the wafer at a location on the first side of the wafer that is between at least two of the plurality of fabricated structure regions.

Abstract: An apparatus including first and second substrates. The first and second substrates each include a base and at least one peripheral wall extending from the base. One of the at least one peripheral walls of the first or second substrates includes at least one well, and the other of the at least one peripheral walls of the first or the seconds substrate that does not include a well is mechanically anchored to the well. The apparatus includes a stack having a first and second end, and the stack is disposed on the base of the first and/or the second substrates at the first and/or second ends. The stack includes at least one element configured to generate energy. A method of assembling the apparatus by contacting the substrates.

Abstract: A stress compensating pick-up tool for aligning a companion chip with a host chip includes a tool tip and an actuator. The tool tip holds the companion chip, and includes a first tip portion and a second tip portion. The actuator applies a force to the tool tip, wherein the force causes the first tip portion and the second tip portion to rotate in opposite directions with respect to one another to optically align a portion of the companion chip with a corresponding portion of the host chip.

Abstract: A stress compensating pick-up tool for aligning a companion chip with a host chip includes a tool tip and an actuator. The tool tip holds the companion chip, and includes a first tip portion and a second tip portion. The actuator applies a force to the tool tip, wherein the force causes the first tip portion and the second tip portion to rotate in opposite directions with respect to one another to optically align a portion of the companion chip with a corresponding portion of the host chip.

Abstract: At least a portion of an integrated circuit wafer includes at least one layer in which two or more waveguides are formed. A cavity is formed in the integrated circuit wafer. At least one die, comprising a photonic integrated circuit, has: at least one edge on which there are two or more optical mode defining structures in proximity to respective optical mode defining structures on at least one surface of the cavity, a bottom surface secured to a bottom surface of the cavity, and a top surface on which there is at least one metal contact.

Abstract: At least a portion of an integrated circuit wafer includes at least one layer in which two or more waveguides are formed. A cavity is formed in the integrated circuit wafer. At least one die, comprising a photonic integrated circuit, has: at least one edge on which there are two or more optical mode defining structures in proximity to respective optical mode defining structures on at least one surface of the cavity, a bottom surface secured to a bottom surface of the cavity, and a top surface on which there is at least one metal contact.

Abstract: A stress compensating pick-up tool for aligning a companion chip with a host chip includes a tool tip and an actuator. The tool tip holds the companion chip, and includes a first tip portion and a second tip portion. The actuator applies a force to the tool tip, wherein the force causes the first tip portion and the second tip portion to rotate in opposite directions with respect to one another to optically align a portion of the companion chip with a corresponding portion of the host chip.

Abstract: A wedge bonding method for simultaneously connecting two wires to a first component and then to a second component includes a) feeding the two wires side by side through a guide channel located at a lower end of a bonding wedge tool, b) positioning the bonding wedge tool over the first component and performing a first bond connection thereon, c) positioning the bonding wedge tool over the second component and performing a second bond connection thereon; and d) breaking tails of the two wires near the second bond connection.

Abstract: A power efficient assembly is provided for applying a temperature gradient to a Fiber Bragg grating. The assembly includes inner and outer enclosures, the outer enclosure defining an insulation chamber around the inner enclosure. The respective ends of the inner and outer enclosures are in thermal contact. A heat exchange system, such as coiled resistive wires or thermo-electric coolers, applies different temperatures to the opposite ends of the outer enclosure.

Abstract: A power efficient assembly is provided for applying a temperature gradient to a Fiber Bragg grating. The assembly includes inner and outer enclosures, the outer enclosure defining an insulation chamber around the inner enclosure. The respective ends of the inner and outer enclosures are in thermal contact. A heat exchange system, such as coiled resistive wires or thermo-electric coolers, applies different temperatures to the opposite ends of the outer enclosure.

Abstract: A colorless tunable dispersion compensator for compensating for chromatic dispersion in a multi-channel light signal is provided. The compensator includes a multi-channel Bragg grating extending along a waveguide. Dispersion tuning means, such as a temperature gradient inducing device, are provided for tuning the dispersion characteristics of the wavelength channels. Wavelength shifting means are also provided for uniformly shifting the central wavelengths of all channels independently of their dispersion characteristics. A uniform temperature inducing or strain applying assembly can be used for this purpose.

Abstract: A method for aligning the spectral responses of two comb-like optical filters is provided. This method does not necessitate the use of spectrally-resolved equipment, as it uses the optical power correlation profile of a broadband light signal representative of the combined spectral responses of the two filters. In one embodiment, the power correlation profile is compared to a pre-stored profile. A tuning method for tuning two filters using this alignment method is also provided. The two filters are first relaxed to an unstretched position, and the second filter is stretched and aligned with the first. The first filter is also stretched and aligned with the other. Both filters are then stretched at a calibrated value.