Patents by Inventor Simon Tam

Simon Tam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070102304
    Abstract: A method of sensing a property of each of a plurality of samples is disclosed. The method includes disposing a sensor chip in each sample, the sensor chip being adapted to sense the property of a respective sample and comprising sensing electronics, a wireless communication device and an identifier. Each sensor chip is then registered and sensed data is received from each of the registered sensor chips concurrently via the respective wireless communication device.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 10, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Simon Tam
  • Patent number: 7187355
    Abstract: A display device comprising a driver circuit which modulates the duty cycle of the on-state of a pixel during a frame period. Preferably the driver circuit comprises a comparator and more preferably the comparator is formed of thin film transistors constituting a differential pair and an inverter. Also provided is a method of driving a display device comprising the step of modulating the duty cycle of the on-state of a pixel during a frame period. Beneficially the display device is an organic electroluminescent active matrix display device.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: March 6, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Simon Tam, Richard Friend
  • Publication number: 20070002007
    Abstract: An electro-optical arrangement includes an electrochromic device which can take either a cleared (transparent) state, a first display state or a second display state, and a driving stage which provides first and second electrode-drive signals to drive the first and second electrodes of the device. At least one of the electrode-drive signals is supplied by way of a polysilicon thin-film buffer. The driving stage in an initial clearing operation outputs approximately equal voltages to the electrodes, which places the device into its transparent state. Subsequently the driver stage applies voltages to the electrodes, such that the device assumes either the first display state or the second display state. In either state it is arranged for the device not to be subjected to more than a safe operating voltage.
    Type: Application
    Filed: June 23, 2006
    Publication date: January 4, 2007
    Applicants: SEIKO EPSON CORPORATION, NTERA LIMITED
    Inventor: Simon Tam
  • Publication number: 20070002008
    Abstract: An electro-optical arrangement includes an electro-optical device, which can take either a first display state or a second display state, and a driving stage which provides first and second electrode-drive signals to drive the first and second electrodes of the device. The driving stage in an initial clearing operation outputs a voltage across the electrodes, which places the device into its second display state corresponding to a second coloration of the device. Subsequently the driver stage applies voltages to the electrodes, such that the device assumes either the first display state (a first coloration) or the second display state (maintained second coloration). This is a writing phase of the device. In either state it is arranged for the device not to be subjected to more than a safe operating voltage across its electrodes.
    Type: Application
    Filed: June 21, 2006
    Publication date: January 4, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Simon Tam
  • Patent number: 7138968
    Abstract: The invention provides an electronic circuit that can include a programming path and a reproduction path. The circuit can further include a current driven element, a transistor in the production path arranged so as to operatively control a current supplied to the current driven element, a capacitor arranged for storing an operating voltage of the transistor, an additional transistor arranged in parallel to the transistor in the programming path for storing the capacitor and the operating voltage, and a switching device that controls the programming path and the reproduction path.
    Type: Grant
    Filed: January 8, 2003
    Date of Patent: November 21, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Toshiyuki Kasai, Simon Tam
  • Publication number: 20060253719
    Abstract: A voltage source droop compensated clock modulation for microprocessors is described. Specifically, the circuit reduces the clock frequency if a voltage source droop is detected.
    Type: Application
    Filed: July 5, 2006
    Publication date: November 9, 2006
    Inventors: Simon Tam, Rahul Limaye, Utpal Desai
  • Publication number: 20060208972
    Abstract: The invention provides an electronic circuit that can include a programming path and a reproduction path. The circuit can further include a current driven element, a transistor in the production path arranged so as to operatively control a current supplied to the current driven element, a capacitor arranged for storing an operating voltage of the transistor, an additional transistor arranged in parallel to the transistor in the programming path for storing the capacitor and the operating voltage, and a switching device that controls the programming path and the reproduction path.
    Type: Application
    Filed: November 4, 2005
    Publication date: September 21, 2006
    Applicant: Seiko Epson Corporation
    Inventors: Toshiyuki Kasai, Simon Tam
  • Publication number: 20060166107
    Abstract: A method for etching a chromium layer is provided herein. In one embodiment, a method for etching a chromium layer includes providing a filmstack in an etching chamber, the filmstack having a chromium layer partially exposed through a patterned layer, providing at least one halogen containing process gas to a processing chamber, biasing the layer disposed on a substrate support in the processing chamber with a plurality of power pulses less than 600 Watts, and etching the chromium layer through a patterned mask. The method for plasma etching a chromium layer described herein is particularly suitable for fabricating photomasks.
    Type: Application
    Filed: January 27, 2005
    Publication date: July 27, 2006
    Inventors: Xiaoyi Chen, Michael Grimbergen, Madhavi Chandrachood, Jeffrey Tran, Ajay Kumar, Simon Tam, Ramesh Krishnamurthy
  • Publication number: 20060119399
    Abstract: A single transistor current-mirror is interfaced with a suitable load in combination with a suitable set of switches to accomplish a comparator function. In particular, the differential circuit comprises a single transistor current mirror, including a capacitor connected to the transistor by a switch, and two current sources connected to the current mirror by respective and independent switches, the switch of one of the current sources being operated together with the capacitor switch so as to charge the capacitor and the switch of the other current source being operated so that the circuit operates as a source-follower amplifier with a current-source load. The comparator function is, thus, not influenced by the spatial distribution of the characteristics of the transistors used to implement the circuit.
    Type: Application
    Filed: August 4, 2004
    Publication date: June 8, 2006
    Inventor: Simon Tam
  • Patent number: 7002536
    Abstract: A display device comprising a plurality of pixels, each pixel containing a light emitting element and a plurality of substantially rectangular shaped circuit areas, the circuit areas comprising two current mirror circuit areas and two input pair circuit areas; the two current mirror circuit areas abutting each other so as to have a side of their rectangular areas in common, the two input pair circuit areas abutting each other so as to have a side of their rectangular areas in common, with both of the input pair circuit areas abutting a respective one of the current mirror circuit areas so as each to have a side of their rectangular areas in common. This arrangement of circuit areas overcomes the problem of spatial variation of TFT characteristics while avoiding the use of compensating circuits. Additionally, this arrangement of circuit areas can reduce to a minimum the p-type and n-type doping area required within each pixel.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: February 21, 2006
    Assignee: Seiko Epson Corporation
    Inventor: Simon Tam
  • Publication number: 20050237281
    Abstract: It is known to compensate for threshold voltage variation of driving transistors in pixel circuits that drive light emission devices such as current driven organic light emission devices. However, programming and initialisation of such pixel circuits can be slow and require a plurality of control or signal lines. The present invention provides a pixel circuit comprising an n-channel transistor for diode-connecting the driver transistor and a means for reducing the number of signal and control lines.
    Type: Application
    Filed: February 28, 2005
    Publication date: October 27, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Simon Tam
  • Publication number: 20050207204
    Abstract: The present invention defines an optoelectronic device comprising a light source, a wave guide and a first signal line, wherein a cell is formed at the intersection between the wave guide and the first signal line, the cell comprising a light activated switch and an output device. The optoelectronic device may be an optoelectronic memory wherein the output device is a storage unit. Alternatively the optoelectronic device may be an optoelectronic display device wherein the output device is a light emitting device or a liquid crystal device.
    Type: Application
    Filed: March 17, 2005
    Publication date: September 22, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Simon Tam, Nishanth Kulasekeram
  • Patent number: 6943759
    Abstract: A driver circuit operating in stages that comprise a programming stage and a reproduction stage, the circuit comprising: a plurality current paths each of which passes through the circuit, a current driven element, a transistor connected so as operatively to control the current supplied to the said element, a capacitor connected for storing an operating voltage of the transistor during the programming stage, and switching means which control the current paths, the arrangement being such that one of the current paths does not include the said element. No current is applied to the current driven element by the current controlling transistor during the programming stage and thus the overall power consumption is reduced. Furthermore, the circuit can be operated from a normal supply voltage rather than requiring a high bias voltage. During the programming stage, the circuit uses a current sink rather than a current source. Preferably, the current driven element is an electroluminescent element.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: September 13, 2005
    Assignee: Seiko Epson Corporation
    Inventor: Simon Tam
  • Patent number: 6937052
    Abstract: A current sensing circuit includes a differential current input stage connected to a differential voltage output stage. The differential current input stage includes a reference current input from a current source and a sensor current input from a sensing device; a first voltage output corresponding to the reference current and a second voltage output corresponding to the sensor current; and a first switch for substantially equalizing the first and second voltage outputs when closed. The first and second voltage outputs are respective inputs to the differential voltage output stage, which then outputs a differential output voltage corresponding to the difference between the first and second voltage outputs.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: August 30, 2005
    Assignee: Seiko Epson Corporation
    Inventor: Simon Tam
  • Publication number: 20050180488
    Abstract: An apparatus for managing the temperature of an integrated circuit having a multiple core microprocessor is described. Specifically, thermal sensors are placed at potential hot spots throughout each microprocessor core. A thermal management unit monitors the thermal sensors. If a thermal sensor identifies a hot spot, the thermal management unit adjusts the operating frequency and voltage of that microprocessor core accordingly.
    Type: Application
    Filed: January 13, 2005
    Publication date: August 18, 2005
    Inventors: Stefan Rusu, Simon Tam
  • Patent number: 6919868
    Abstract: A driver circuit comprises a p-channel transistor and an n-channel transistor connected as a complementary pair of transistors to provide analog control of the drive current for a current driven clement, preferably an organic electroluminescent element (OEL element). The transistors, being of opposite channel, compensate, for any variation in threshold voltage ?VT and therefore provide a drive current to the OEL element which is relatively independent of ?VT. The complementary pair of transistors can be applied to either voltage driving or current driving pixel driver circuits.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: July 19, 2005
    Assignee: Seiko Epson Corporation
    Inventor: Simon Tam
  • Patent number: 6912167
    Abstract: A sensing circuit comprises a charge integrating sense amplifier 4 serially coupled to a discriminator 6. The sensing circuit can be used to sense the logic status of the cells in a random access memory (RAM) system, including ferroelectric RAMs. The use of a charge integrating sense amplifier enables the effect of bit line capacitance intrinsic to RAM circuits to be overcome and also provides efficient charge to voltage conversion gain.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: June 28, 2005
    Assignee: Seiko Epson Corporation
    Inventor: Simon Tam
  • Publication number: 20050057232
    Abstract: The present invention provides an improved form of inverter circuit which refines the known conventional circuit to reduce its offset and then uses a combination of this refined circuit and a feedback type power converter to achieve low output offset, very high speed and very high current efficiency. According to a first aspect of the present invention there is provided a voltage converter circuit comprising serially coupled first and second gain stages and switching means arranged between the second gain stage and an output for the converter circuit, the first gain stage having a gain greater than that of the second gain stage, and the second gain stage having a bandwidth greater than that of the first gain stage.
    Type: Application
    Filed: July 23, 2004
    Publication date: March 17, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Simon Tam, Vinayak Agrawal
  • Publication number: 20050046438
    Abstract: A current sensing circuit comprising a differential current input stage connected to a differential voltage output stage. The differential current input stage comprises a reference current input from a current source and a sensor current input from a sensing device; a first voltage output corresponding to the reference current and a second voltage output corresponding to the sensor current; and a first switch for substantially equalising the first and second voltage outputs when closed. The first and second voltage outputs are respective inputs to the differential voltage output stage, which then outputs a differential output voltage corresponding to the difference between the first and second voltage outputs.
    Type: Application
    Filed: August 26, 2004
    Publication date: March 3, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Simon Tam
  • Patent number: 6855946
    Abstract: In one embodiment, the present invention includes a method. In the method, a fiducial transistor is provided in an integrated circuit. Also in the method, a power conductor is coupled to a first terminal of the transistor. Also in the method, a ground conductor is coupled to a second terminal of the transistor. Also in the method, a control conductor is coupled to a third terminal of the transistor. Also in the method, other circuitry is provided, the other circuitry is operatively decoupled from the fiducial transistor and the other circuitry is operable without the fiducial transistor.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: February 15, 2005
    Assignee: Intel Corporation
    Inventors: Steve Seidel, Simon Tam, Valluri Rao, Stefan Rusu, Richard Livengood