Abstract: Methods and apparatus for forming structures to reduce wafer warpage. A method includes providing a semiconductor wafer having a plurality of integrated circuits; providing a photomask defining a plurality of cavities to be formed by an etch on a backside surface of the semiconductor wafer; defining structural support areas for the backside surface, the structural support areas being contiguous areas; providing areas on the photomask that correspond to the structural support areas, the structural support areas being areas that are not to be etched; using the photomask, performing an etch on the backside surface of the semiconductor wafer to form the cavities by removing semiconductor material from the backside surface of the semiconductor wafer; and the structural supports on the backside of the semiconductor wafer formed as areas that are not subjected to the etch. Additional methods and apparatus are also disclosed.

Abstract: Methods and apparatus for front-to-back alignment using narrow scribe lines are disclosed. An apparatus is disclosed that includes a semiconductor wafer comprising a plurality of areas for the fabrication of integrated circuit devices on a device side, the integrated circuit devices arranged in rows and columns and spaced from one another by a plurality of scribe lines disposed on the semiconductor wafer in areas between the integrated circuit devices and free from integrated circuit devices; and one or more alignment marks disposed on the semiconductor wafer, the alignment marks positioned in an intersection of two of the scribe lines; wherein the scribe lines have a first minimum dimension and the one or more alignment marks have a second minimum dimension that is greater than the first minimum dimension. Methods and additional apparatus are disclosed.