Abstract: A driver circuit includes an input node to receive an input signal for conversion at the output node of a converter, a driver node to provide to a switching power circuit stage in the converter a pulse-width modulated drive signal having an active time, first and second active time generation paths, and a selector circuit coupled to the first and second active time generation paths. The circuit is operable selectively in a first and a second operational mode wherein the driver node receives the pulse-width modulated drive signal having a first active time value generated in the first active time generation path, or a second active time value generated in the second active time generation path. The second active time generation path includes an active time generator network to provide a second active time value with the second active time value adaptively variable to match the first active time value.

Abstract: An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposing ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.

Abstract: An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposing ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.

Abstract: An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposed ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.

Abstract: A driver circuit includes an input node to receive an input signal for conversion at the output node of a converter, a driver node to provide to a switching power circuit stage in the converter a pulse-width modulated drive signal having an active time, first and second active time generation paths, and a selector circuit coupled to the first and second active time generation paths. The circuit is operable selectively in a first and a second operational mode wherein the driver node receives the pulse-width modulated drive signal having a first active time value generated in the first active time generation path, or a second active time value generated in the second active time generation path. The second active time generation path includes an active time generator network to provide a second active time value with the second active time value adaptively variable to match the first active time value.

Abstract: A driver circuit includes an input node to receive an input signal for conversion at the output node of a converter, a driver node to provide to a switching power circuit stage in the converter a pulse-width modulated drive signal having an active time, first and second active time generation paths, and a selector circuit coupled to the first and second active time generation paths. The circuit is operable selectively in a first and a second operational mode wherein the driver node receives the pulse-width modulated drive signal having a first active time value generated in the first active time generation path, or a second active time value generated in the second active time generation path. The second active time generation path includes an active time generator network to provide a second active time value with the second active time value adaptively variable to match the first active time value.

Abstract: An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposed ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.

Abstract: A converter circuit includes an input node for receiving an input signal and an output node for providing a converted output signal to a load, a switching power stage to receive the input signal and an on-off drive signal switching between an on-state and an off-state, and a reactive output network coupled to the switching power stage and configured to provide the converted output signal to the load. The converter circuit comprises a first feedback signal path configured to generate a PWM-modulated control signal for the switching power stage as a function of the converted output signal, and a second feedback signal path including an output variation sensing circuit to generate at least one output variation signal indicative of variations of the converted output signal over time.

Abstract: A converter circuit includes an input node for receiving an input signal and an output node for providing a converted output signal to a load, a switching power stage to receive the input signal and an on-off drive signal switching between an on-state and an off-state, and a reactive output network coupled to the switching power stage and configured to provide the converted output signal to the load. The converter circuit comprises a first feedback signal path configured to generate a PWM-modulated control signal for the switching power stage as a function of the converted output signal, and a second feedback signal path including an output variation sensing circuit to generate at least one output variation signal indicative of variations of the converted output signal over time.

Abstract: A driver circuit includes an input node to receive an input signal for conversion at the output node of a converter, a driver node to provide to a switching power circuit stage in the converter a pulse-width modulated drive signal having an active time, first and second active time generation paths, and a selector circuit coupled to the first and second active time generation paths. The circuit is operable selectively in a first and a second operational mode wherein the driver node receives the pulse-width modulated drive signal having a first active time value generated in the first active time generation path, or a second active time value generated in the second active time generation path. The second active time generation path includes an active time generator network to provide a second active time value with the second active time value adaptively variable to match the first active time value.