Patents by Inventor Simoni Ben Michael
Simoni Ben Michael has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11621918Abstract: A transmitter can manage when a transmit queue is permitted to transmit and an amount of data permitted to be transmitted. After a transmit queue is permitted to transmit, the transmit queue can be placed in a sleep state if the transmit queue has exceeded its permitted data transmission quota. The wake time of the transmit queue can be scheduled based on a token accumulation rate for the transmit queue. The token accumulation rate can be increased if the transmit queue has other data to transmit after the data transmission. The token accumulation rate can be decreased if the transmit does not have other data to transmit.Type: GrantFiled: December 5, 2018Date of Patent: April 4, 2023Assignee: Intel CorporationInventors: Ben-Zion Friedman, Simoni Ben-Michael, Arvind Srinivasan, Tony Hurson, Adam Conyers, Hemanth Krishnan
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Patent number: 11616723Abstract: At a network-connected device, congestion at an egress queue can be detected. A potential source of congestion can be identified based on characteristics of a packet that caused the egress queue to become congested. The source of congestion can be a congestion group of transmitters. A group congestion message can be sent to the group of transmitters. The message can identify the packet that caused the egress queue to become congested. Transmitters can respond to the message by reducing their peak transmission rate.Type: GrantFiled: December 5, 2018Date of Patent: March 28, 2023Assignee: Intel CorporationInventors: Ben-Zion Friedman, Simoni Ben-Michael, Arvind Srinivasan, Tony Hurson, Adam Conyers, Hemanth Krishnan
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Patent number: 10944660Abstract: Examples described herein include configuration of a transmitting network device to identify a source queue-pair identifier in at least some of the packets that are transmitted to an endpoint destination. A network device that receives packets and experiences congestion can determine if a congestion causing packet includes a source queue-pair identifier. If the congestion causing packet includes a source queue-pair identifier, the network device can form and transmit a congestion notification message with a copy of the source queue-pair identifier to the transmitting network device. The transmitting network device can access a context for the congestion causing packet using the source queue-pair identifier without having to perform a lookup to identify the context.Type: GrantFiled: July 19, 2019Date of Patent: March 9, 2021Assignee: Intel CorporationInventors: Tony Hurson, Simoni Ben-Michael, Ben-Zion Friedman
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Publication number: 20190342199Abstract: Examples described herein include configuration of a transmitting network device to identify a source queue-pair identifier in at least some of the packets that are transmitted to an endpoint destination. A network device that receives packets and experiences congestion can determine if a congestion causing packet includes a source queue-pair identifier. If the congestion causing packet includes a source queue-pair identifier, the network device can form and transmit a congestion notification message with a copy of the source queue-pair identifier to the transmitting network device. The transmitting network device can access a context for the congestion causing packet using the source queue-pair identifier without having to perform a lookup to identify the context.Type: ApplicationFiled: July 19, 2019Publication date: November 7, 2019Inventors: Tony HURSON, Simoni BEN-MICHAEL, Ben-Zion FRIEDMAN
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Publication number: 20190116121Abstract: A transmitter can manage when a transmit queue is permitted to transmit and an amount of data permitted to be transmitted. After a transmit queue is permitted to transmit, the transmit queue can be placed in a sleep state if the transmit queue has exceeded its permitted data transmission quota. The wake time of the transmit queue can be scheduled based on a token accumulation rate for the transmit queue. The token accumulation rate can be increased if the transmit queue has other data to transmit after the data transmission. The token accumulation rate can be decreased if the transmit does not have other data to transmit.Type: ApplicationFiled: December 5, 2018Publication date: April 18, 2019Inventors: Ben-Zion FRIEDMAN, Simoni BEN-MICHAEL, Arvind SRINIVASAN, Tony HURSON, Adam CONYERS, Hemanth KRISHNAN
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Publication number: 20190116122Abstract: At a network-connected device, congestion at an egress queue can be detected. A potential source of congestion can be identified based on characteristics of a packet that caused the egress queue to become congested. The source of congestion can be a congestion group of transmitters. A group congestion message can be sent to the group of transmitters. The message can identify the packet that caused the egress queue to become congested. Transmitters can respond to the message by reducing their peak transmission rate.Type: ApplicationFiled: December 5, 2018Publication date: April 18, 2019Inventors: Ben-Zion FRIEDMAN, Simoni BEN-MICHAEL, Arvind SRINIVASAN, Tony HURSON, Adam CONYERS, Hemanth KRISHNAN
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Patent number: 9280504Abstract: Methods, apparatus, and systems for enhancing communication between compute resources and networks in a micro-server environment. Micro-server modules configured to be installed in a server chassis include a plurality of processor subsystems coupled in communication to a shared Network Interface Controller (NIC) via PCIe links. The shared NIC includes at least one Ethernet port and a PCIe block including a shared PCIe interface having a first number of lanes. The PCIe lines between the processor sub-systems and the shared PCIe interface employ a number of lanes that is less than the first number of lanes, and during operation of the micro-server module, the shared NIC is configured to enable each processor sub-system to access the at least one Ethernet port using the PCIe link between that processor sub-system and the shared PCIe block on the shared NIC.Type: GrantFiled: August 24, 2012Date of Patent: March 8, 2016Assignee: Intel CorporationInventors: Simoni Ben-Michael, Eliel Louzoun
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Patent number: 9064116Abstract: Techniques for a data storage device to locally implement security management functionality. In an embodiment, a security management process of the data storage device is to determine whether an access to non-volatile media of the data storage device is authorized. In certain embodiments, the data storage device is to restrict access to a secure region of the non-volatile storage media, the secure region to store information used and/or generated by a security management process of the data storage device.Type: GrantFiled: November 8, 2010Date of Patent: June 23, 2015Assignee: Intel CorporationInventors: Nicholas D. Triantafillou, Paritosh Saxena, Robert W. Strong, Richard J. Heiler, Eliezer Tamir, Simoni Ben-Michael, Brad W. Stewart, Akshay R. Kadam, Men Long, James T. Doyle, Hormuzd M. Khosravi, Lokpraveen B. Mosur, Edward J. Pullin, Paul S. Schmitz, Carol L. Barrett, Paul J. Thadikaran
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Publication number: 20140059266Abstract: Methods, apparatus, and systems for enhancing communication between compute resources and networks in a micro-server environment. Micro-server modules configured to be installed in a server chassis include a plurality of processor subsystems coupled in communication to a shared Network Interface Controller (NIC) via PCIe links. The shared NIC includes at least one Ethernet port and a PCIe block including a shared PCIe interface having a first number of lanes. The PCIe lines between the processor sub-systems and the shared PCIe interface employ a number of lanes that is less than the first number of lanes, and during operation of the micro-server module, the shared NIC is configured to enable each processor sub-system to access the at least one Ethernet port using the PCIe link between that processor sub-system and the shared PCIe block on the shared NIC.Type: ApplicationFiled: August 24, 2012Publication date: February 27, 2014Inventors: Simoni Ben-Michael, Eliel Louzoun
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Publication number: 20120117348Abstract: Techniques for a data storage device to locally implement security management functionality. In an embodiment, a security management process of the data storage device is to determine whether an access to non-volatile media of the data storage device is authorized. In certain embodiments, the data storage device is to restrict access to a secure region of the non-volatile storage media, the secure region to store information used and/or generated by a security management process of the data storage device.Type: ApplicationFiled: November 8, 2010Publication date: May 10, 2012Inventors: Nicholas D. Triantafillou, Paritosh Saxena, Robert W. Strong, Richard J. Heiler, Eliezer Tamir, Simoni Ben-Michael, Brad W. Stewart, Akshay R. Kadam, Men Long, James T. Doyle, Hormuzd M. Khosravi, Lokpraveen B. Mosur, Edward J. Pullin, Paul S. Schmitz, Carol L. Barrett, Paul J. Thadikaran
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Patent number: 7302055Abstract: A receiver to detect pulses on a home phone wiring network using envelope detection. The receiver comprises an integrating capacitor charged by a first current source responsive to a differential signal propagated on the wiring network, and discharged by a FET in combination with a second current source. The combination of the FET and the second current source allows the capacitor to be quickly discharged in a smooth fashion. An application of this receiver is for a PHY according to the Home Phoneline Networking Alliance.Type: GrantFiled: March 1, 2000Date of Patent: November 27, 2007Assignee: Intel CorporationInventors: Lior Horwitz, Noam Avni, Simoni Ben-Michael
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Patent number: 7006517Abstract: A PHY for transmitting link frames on a home phone line network without the need of a MAC layer. The PHY transmits an initial link frame if the PHY has not transmitted a frame for a time interval, as specified by the Home Phoneline Networking Alliance. After transmission of the initial link frame, the transmit-clock signal to the MAC is disabled so that the MAC does not request the PHY to transmit a frame. If a collision is detected during transmission of the initial link frame, a counter is set to zero and the PHY transmits back-to-back link frames, where the initial link frame and the back-to-back link frames are each separated by an IPG (Inter Packet Gap). When transmitting these back-to-back link frames, the counter is incremented each time a collision is detected. When the counter equals a specified number, the transmit-clock signal to the MAC is enabled and the PHY waits for a random interval of time before beginning the above-described process again.Type: GrantFiled: March 29, 2000Date of Patent: February 28, 2006Assignee: Intel CorporationInventors: Simoni Ben Michael, Aviad J. Wertheimer, Simcha Pearl
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Publication number: 20030167381Abstract: A shared memory access controller method and system utilize a load monitor unit able to monitor memory access requirements of one or more devices coupled to a memory. A load manager unit coupled to the load monitor unit is able to set an access policy for at least one of the devices in relation to data from the load monitor. There is also an access control unit connected to the load manager unit and able to provide a device access to the memory based on the device's associated access policy.Type: ApplicationFiled: March 4, 2002Publication date: September 4, 2003Inventors: Israel Herscovich, Simoni Ben-Michael, Meir Tsadik
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Patent number: 6145102Abstract: A computer may have a management bus installed, where the management bus is coupled to sensors which monitor status of components of the computer. The management bus may also be coupled to a management bus processor, where the management bus processor receives status information from the management bus concerning status of components of the computer. An interface between the management bus and the network subsystem permits transmission of an error message in the event that the computer has a failure which inactivates the system CPU, the system bus, the system memory, or the system power supply.Type: GrantFiled: January 20, 1998Date of Patent: November 7, 2000Assignee: Compaq Computer CorporationInventors: Philippe Klein, Simoni Ben-Michael, Avraham Menachem, Sarit Shvimmer
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Computer with remote wake up and transmission of a status packet when the computer fails a self test
Patent number: 6134665Abstract: An apparatus for use in a computer has a network interface subsystem having power applied thereto when power is removed from other components of the computer. A receiver in the network interface subsystem receives a packet directed to the computer from the network, and in response to receipt of a selected packet, restores power to the other components of the computer. Upon restoration of power to the other components of the computer, a signalling device reports status of at least one of the other components of the computer to the network interface subsystem. A transmitter in the network interface subsystem sends, in response to the signalling device, a status packet onto the network giving a status of the computer in the event that a component is not functional, following restoration of power to the other components of the computer.Type: GrantFiled: January 20, 1998Date of Patent: October 17, 2000Assignee: Digital Equipment CorporationInventors: Philippe Klein, Simoni Ben-Michael, Avraham Menachem, Sarit Shvimmer -
Patent number: 6101608Abstract: A method and related apparatus enables one station on a local area network (LAN) 24 to securely wake up another station on the LAN 24 although the stations may be physically remote from each other. A workstation 12, acting as a remote management console, generates a secure wake-up packet 42 intended for a desktop computer 14 on the LAN 24. The desktop computer 14 is operating in a sleep state. The data section of the secure wake-up packet has a particular sequence of data including a synchronization sequence 46, a MAC address sequence 48 and a password sequence 50. The desktop computer 14 has a network interface 64 for detecting and processing secure wake-up packets 70 when that network interface 64 is operating in a remote access control mode. The network interface 64 verifies that MAC address sequence 48 corresponds to the MAC address of the desktop computer 14 and that the password sequence 50 has a predetermined relationship with a password required to wake up the desktop computer 14.Type: GrantFiled: February 20, 1997Date of Patent: August 8, 2000Assignee: Compaq Computer CorporationInventors: Thomas J. Schmidt, Larry Huppert, Simoni Ben-Michael, Michael Ben-Nun
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Patent number: 6097705Abstract: A repeater device for forwarding a data packet from a first Ethernet collision domain to a second Ethernet collision domain has a plurality of ports, each port for connection to an independent Ethernet collision domain, each port has an associated receive buffer and an associated transmit buffer, and there is a means for forwarding a data packet from the receive buffer of a receiving port to the transmit buffer of a transmitting port. A data packet received at the receiving port is then first stored in that port's the receive buffer, is forwarded to the transmit buffer of the transmitting port, and is then transmitted from the transmit buffer by the transmitting port.Type: GrantFiled: January 7, 1997Date of Patent: August 1, 2000Assignee: Cabletron Systems, Inc.Inventors: Simoni Ben-Michael, Shuki Perlman, Avraham Menachem
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Patent number: 6085328Abstract: A reliable and simple means to awaken sleeping computers is to maintain the network interface subsystem at full power, and to filter detected packets so that when desired packets are detected, full power is restored to the entire computer. An interface to connect a computer to a network is provided, where, the computer has a high power state and a low power state, and the computer is capable of normal operation when in the high power state, and the computer is substantially inactivated when in the low power state. A packet is received from the network. The packet is filtered by computing a hash function using at least one byte selected from the packet. A transition is initiated, responsive to a result of filtering the packet, to transition the computer from the low power state to the high power state. A mask may be used to select the at least one byte. Several bytes may be selected by the mask. A first register may be used to hold the mask.Type: GrantFiled: January 20, 1998Date of Patent: July 4, 2000Assignee: Compaq Computer CorporationInventors: Philippe Klein, Simoni Ben-Michael
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Patent number: 6078565Abstract: A relatively small FIFO queue is located on a semiconductor chip receiving and transmitting data in a computer system, typically a computer network. The FIFO queue has additional storage capability in the form of an expansion into the local memory of the computer system. The front and back ends of the FIFO, which are involved in receiving and transmitting data, are implemented on the chip. The FIFO expands into the space provided in the local memory only when the on-chip portion of the FIFO is full. The middle portion of the FIFO resides in expansion in the local memory. The local memory is accessed only in bursts of multiple credits, both for read transactions and for write transactions.Type: GrantFiled: June 20, 1997Date of Patent: June 20, 2000Assignee: Digital Equipment CorporationInventors: Simoni Ben-Michael, Michael Ben-Nun, Yifat Ben-Shahar
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Patent number: 6002675Abstract: A repeater which introduces a minimum of delay in the transfer of a data packet from a source LAN to a destination LAN has an arbiter which grants access to a bus for a port to broadcast a received data packet onto the bus for loading the data packet into a transmit buffer for each outgoing port. The arbiter grants access only after all ports signal that their transmit buffers are ready to load the data packet from the bus. A transmit buffer signals that it is ready to be loaded at the passage of the collision window as it is transmitting a packet previously loaded into the transmit buffer. Accordingly, the transmit buffer is simultaneously transmitting the previously loaded packet and loading the new packet after the arbiter responds to the signal.Type: GrantFiled: January 6, 1997Date of Patent: December 14, 1999Assignee: Cabletron Systems, Inc.Inventors: Simoni Ben-Michael, Shuki Perlman, Avraham Menachem