Abstract: An image sensor includes a first column line and a second column line configured to extend in a first direction, a plurality of pixel groups configured to connect to the first column line or the second column line and to comprise a plurality of pixels in each of the plurality of pixel groups, a bias circuit configured to comprise a first current circuit and a second current circuit configured to output different bias currents in a first operational mode, and a switching circuit configured to connect the first column line to the first current circuit and connect the second column line to the second current circuit during a first time period, and to connect the first column line to the second current circuit and connect the second column line to the first current circuit during a second time period subsequent to the first time period in the first operational mode.

Abstract: An image sensor includes a first column line and a second column line configured to extend in a first direction, a plurality of pixel groups configured to connect to the first column line or the second column line and to comprise a plurality of pixels in each of the plurality of pixel groups, a bias circuit configured to comprise a first current circuit and a second current circuit configured to output different bias currents in a first operational mode, and a switching circuit configured to connect the first column line to the first current circuit and connect the second column line to the second current circuit during a first time period, and to connect the first column line to the second current circuit and connect the second column line to the first current circuit during a second time period subsequent to the first time period in the first operational mode.

Abstract: An image sensor includes a first column line and a second column line configured to extend in a first direction, a plurality of pixel groups configured to connect to the first column line or the second column line and to comprise a plurality of pixels in each of the plurality of pixel groups, a bias circuit configured to comprise a first current circuit and a second current circuit configured to output different bias currents in a first operational mode, and a switching circuit configured to connect the first column line to the first current circuit and connect the second column line to the second current circuit during a first time period, and to connect the first column line to the second current circuit and connect the second column line to the first current circuit during a second time period subsequent to the first time period in the first operational mode.

Abstract: An image processing device includes a switch signal generator, an amplifier, a ramp generator, and an attenuation control circuit. The switch signal generator generates switch control signals based on a level of an image signal that corresponds to a pixel signal output from a pixel. The amplifier includes a first input terminal and a second input terminal. The ramp generator generates a ramp signal. The attenuation control circuit adjusts an arrangement of capacitors according to the switch control signals to control whether to attenuate each of the pixel signal and the ramp signal, and transmits signals generated as a result of the adjusted arrangement to the first input terminal and the second input terminal.

Abstract: There are provided an image sensor and a stacked structure thereof. The image sensor includes a pixel array in which a plurality of unit pixels for generating an output signal in accordance with incident light are arranged, a first amplifier having a first input dynamic range, and a second amplifier having a second input dynamic range that is larger than the first input dynamic range. One of the first and second amplifiers amplifies the output signal in accordance with the intensity of light.

Abstract: A correlated double sampling (CDS) circuit may include a sampling circuit and a switching circuit. The CDS circuit may perform a CDS operation on a reset component of an input signal and an image component of the input signal based on a ramp signal, and the CDS circuit may generate an output signal. The switching circuit may include an auto-zero switch that connects a first input terminal receiving the input signal to an output node in response to an auto-zero control signal during an auto-zero interval. The switching circuit may connect a first terminal of the auto-zero switch to a reference voltage in order to cutoff a leakage current flowing to the auto-zero switch in response to a first boosting control signal during a first comparison interval and a second comparison interval. The output signal may be provided at the output node.

Abstract: One embodiment of an analog-to-digital converter includes at least one comparator and a restriction circuit. The comparator has first and second input nodes and a connection node. The connection node is one of an internal node and an output node of the comparator. The restriction circuit is electrically connected to the connection node, and the restriction circuit is configured to restrict a voltage of the connection node.

Abstract: An image processing device includes a switch signal generator, an amplifier, a ramp generator, and an attenuation control circuit. The switch signal generator generates switch control signals based on a level of an image signal that corresponds to a pixel signal output from a pixel. The amplifier includes a first input terminal and a second input terminal. The ramp generator generates a ramp signal. The attenuation control circuit adjusts an arrangement of capacitors according to the switch control signals to control whether to attenuate each of the pixel signal and the ramp signal, and transmits signals generated as a result of the adjusted arrangement to the first input terminal and the second input terminal.

Abstract: There are provided an image sensor and a stacked structure thereof. The image sensor includes a pixel array in which a plurality of unit pixels for generating an output signal in accordance with incident light are arranged, a first amplifier having a first input dynamic range, and a second amplifier having a second input dynamic range that is larger than the first input dynamic range. One of the first and second amplifiers amplifies the output signal in accordance with the intensity of light.

Abstract: A correlated double sampling (CDS) circuit may include a sampling circuit and a switching circuit. The CDS circuit may perform a CDS operation on a reset component of an input signal and an image component of the input signal based on a ramp signal, and the CDS circuit may generate an output signal. The switching circuit may include an auto-zero switch that connects a first input terminal receiving the input signal to an output node in response to an auto-zero control signal during an auto-zero interval. The switching circuit may connect a first terminal of the auto-zero switch to a reference voltage in order to cutoff a leakage current flowing to the auto-zero switch in response to a first boosting control signal during a first comparison interval and a second comparison interval. The output signal may be provided at the output node.

Abstract: A temperature sensor includes a band gap reference (BGR) circuit, a voltage generation unit and a digital CDS circuit. The band gap reference (BGR) circuit generates a reference voltage proportional to a temperature. The voltage generation unit generates a first voltage and a second voltage based on the reference voltage, where the first voltage and the second voltage are proportional to the temperature. The digital CDS circuit generates a digital signal corresponding to the temperature by performing a digital correlated double sampling (CDS) operation on the first voltage and the second voltage. The temperature sensor is able to detect a temperature accurately.

Abstract: One embodiment of an analog-to-digital converter includes at least one comparator and a restriction circuit. The comparator has first and second input nodes and a connection node. The connection node is one of an internal node and an output node of the comparator. The restriction circuit is electrically connected to the connection node, and the restriction circuit is configured to restrict a voltage of the connection node.

Abstract: One embodiment of an analog-to-digital converter includes at least one comparator and a restriction circuit. The comparator has first and second input nodes and a connection node. The connection node is one of an internal node and an output node of the comparator. The restriction circuit is electrically connected to the connection node, and the restriction circuit is configured to restrict a voltage of the connection node.

Abstract: One embodiment of an analog-to-digital converter includes at least one comparator and a restriction circuit. The comparator has first and second input nodes and a connection node. The connection node is one of an internal node and an output node of the comparator. The restriction circuit is electrically connected to the connection node, and the restriction circuit is configured to restrict a voltage of the connection node.

Abstract: A temperature sensor includes a band gap reference (BGR) circuit, a voltage generation unit and a digital CDS circuit. The band gap reference (BGR) circuit generates a reference voltage proportional to a temperature. The voltage generation unit generates a first voltage and a second voltage based on the reference voltage, where the first voltage and the second voltage are proportional to the temperature. The digital CDS circuit generates a digital signal corresponding to the temperature by performing a digital correlated double sampling (CDS) operation on the first voltage and the second voltage. The temperature sensor is able to detect a temperature accurately.