Patents by Inventor Sin Tan
Sin Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12300774Abstract: A light source comprises a backplane wafer with electrical circuits fabricated thereon, and an array of LEDs coupled to the backplane wafer. Each LED of the array of LEDs comprises a mesa structure including semiconductor epitaxial layers and characterized by inwardly tilted mesa sidewalls, a high-refractive index material region (e.g., with a refractive index greater than about 1.75, such as equal to or greater than a refractive index of the semiconductor epitaxial layers) surrounding the semiconductor epitaxial layers of the mesa structure and including outwardly tilted sidewalls, and a reflective layer on the outwardly tilted sidewalls of the high-refractive index material region. In one example, each LED of the array of LEDs also include a passivation layer on the inwardly tilted mesa sidewalls of the mesa structure.Type: GrantFiled: February 25, 2022Date of Patent: May 13, 2025Assignee: Meta Platforms Technologies, LLCInventors: Wei Sin Tan, Andrea Pinos, Samir Mezouari, Kathleen Bonnie Vinden, John Lyle Whiteman
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Patent number: 12125944Abstract: A light emitting diode includes an n-type semiconductor layer including a pit structure formed therein, active layers grown only on sidewalls of the pit structure and configured to emit light, and a p-type semiconductor layer on the active layers and at least partially in the pit structure. In one embodiment, the pit structure is characterized by a shape of an inverted pyramid. The pit structure is formed in the n-type semiconductor layer by, for example, etching the n-type semiconductor layer using an etch mask layer having apertures with slanted sidewalls, or growing the n-type semiconductor layer on a substrate through a mask layer having an array of apertures.Type: GrantFiled: October 25, 2021Date of Patent: October 22, 2024Assignee: META PLATFORMS TECHNOLOGIES, LLCInventors: Wei Sin Tan, Andrea Pinos, Xiang Yu, Samir Mezouari
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Publication number: 20240339565Abstract: A micro LED pixel and a micro LED panel are provided. The micro LED pixel includes a first light emitting mesa; a second light emitting mesa provided above the first light emitting mesa and covering a part of the first light emitting mesa; and a third light emitting mesa provided above the second light emitting mesa and covering a part of the second light emitting mesa; wherein a shape of a top surface of the first light emitting mesa is a triangle.Type: ApplicationFiled: April 3, 2024Publication date: October 10, 2024Inventors: Qunchao XU, Wei Sin TAN
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Publication number: 20240213406Abstract: A micro LED structure and a full color micro LED panel are provided by the disclosure. The micro LED structure comprises an IC back plane, at least three mesa structures stacked along a vertical axis, and a top contact formed above the at least three mesa structures. The second mesa structure comprises a first connecting layer, a first reflection layer formed on the first connecting layer, a first bonding layer formed on the first reflection layer, a first light emitting layer formed on the first bonding layer, and a second connecting layer formed on the first light emitting layer. The third mesa structure comprises a second reflection layer formed on the second connecting layer, a second bonding layer formed on the second reflection layer, a second light emitting layer formed on the second bonding layer, and a third connecting layer formed on the second light emitting layer.Type: ApplicationFiled: December 17, 2023Publication date: June 27, 2024Inventors: Wei Sin TAN, Qunchao XU
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Publication number: 20240213292Abstract: A micro LED structure and a full color micro LED panel provided by the disclosure comprises: at least three mesa structures. A first dielectric layer is formed between the first connecting layer and the second connecting layer, the third connecting layer is shared by the second mesa structure and the third mesa structure. The micro LED structure can improve the light emitting efficiency and reduce the cross talk between the adjacent micro LEDs.Type: ApplicationFiled: December 17, 2023Publication date: June 27, 2024Inventors: Wei Sin TAN, Qunchao XU
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Publication number: 20240213293Abstract: A full color micro LED structure is disclosed. The micro LED structure comprises an IC back plane, at least three mesa structures stacked along a vertical axis, and a top contact formed above the at least three mesa structures. The second mesa structure comprises two connecting layers, a reflection layer, and a light emitting layer. The third mesa structure comprises a bonding layer, a reflection layer, a light emitting layer, and a connecting layer.Type: ApplicationFiled: December 17, 2023Publication date: June 27, 2024Inventors: Wei Sin TAN, Qunchao XU
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Publication number: 20240213229Abstract: Micro LED structures and micro LED panels using the same are disclosed. A disclosed micro LED includes an IC back plane, and a stack of mesa structures comprising at least a first and a second mesa structures. The first mesa structure comprises: a first light-emitting layer, a first connecting layer formed on the first light-emitting layer, and a first conductive bonding layer formed under the first light-emitting layer and electrically connecting the first light-emitting layer to the IC back plane. The second mesa structure is formed on the first mesa structure and comprises: a second light-emitting layer, a second connecting layer formed on the second light-emitting layer, a second conductive bonding layer formed under the second light-emitting layer, and a third connecting layer formed under the second conductive bonding layer and electrically connected to the second light-emitting layer via the second conductive bonding layer.Type: ApplicationFiled: December 17, 2023Publication date: June 27, 2024Inventors: Wei Sin TAN, Qunchao XU
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Publication number: 20240021759Abstract: A light source includes a substrate, an array of semiconductor structures grown on the substrate, and multi-color micro-LEDs grown on surfaces of the array of semiconductor structures. Each semiconductor structure of the array of semiconductor structures has a shape of a truncated pyramid. The light source includes multiple sets of micro-LEDs formed on top surfaces of multiple sets of semiconductor structures of the array of semiconductor structures, or formed on the top surfaces and/or multiple sidewall surfaces of the array of semiconductor structures. The multiple sets of micro-LEDs are configured to emit light of multiple colors.Type: ApplicationFiled: July 14, 2022Publication date: January 18, 2024Inventors: Samir MEZOUARI, Andrea PINOS, Wei Sin TAN, John Lyle WHITEMAN
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Publication number: 20240006460Abstract: A light emitting diode structure comprising: a p-type region; an n-type region; a gate contact; a first light emitting region for recombination of carriers injectable by the p-type region and the n-type region; and a second light emitting region for recombination of carriers injectable by the p-type region and the n-type region, wherein the first light emitting region and the second light emitting region at least partially overlap to form a light emitting surface associated with the first light emitting region and the second light emitting region; wherein the p-type region is at least partially formed in a first channel through the first light emitting region and the second light emitting region, and the n-type region is at least partially formed in a second channel through the first light emitting region and the second light emitting region, wherein the light emitting device is configured such that the wavelength of light emitted by the light emitting surface is controllable by varying a gate voltage appliedType: ApplicationFiled: November 24, 2021Publication date: January 4, 2024Inventors: Andrea Pinos, Wei Sin Tan, Samir Mezouari
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Patent number: 11841508Abstract: A light source includes an array of micro-light emitting diodes (micro-LEDs), an array of micro-lenses, and a bonding layer bonding the array of micro-lenses to the array of micro-LEDs. Each micro-LED of the array of micro-LEDs includes a first mesa structure formed in a plurality of semiconductor layers. The array of micro-lenses is bonded to a first semiconductor layer of the plurality of semiconductor layers by the bonding layer. The first semiconductor layer includes an array of second mesa structures formed therein. The first mesa structure and the second mesa structure are on opposite sides of the plurality of semiconductor layers. Each second mesa structure of the array of second mesa structures is aligned with a respective micro-lens of the array of micro-lenses and the first mesa structure of a respective micro-LED of the array of micro-LEDs.Type: GrantFiled: April 13, 2022Date of Patent: December 12, 2023Assignee: META PLATFORMS TECHNOLOGIES, LLCInventors: Samir Mezouari, Andrea Pinos, Wei Sin Tan, John Lyle Whiteman
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Publication number: 20230369535Abstract: A light source includes an array of core-shell nanowire micro-LEDs. Each core-shell nanowire micro-LED includes: a first semiconductor epitaxial layer including a nanowire core formed therein; a first dielectric material layer in physical contact with and surrounding sidewalls of a bottom portion of the nanowire core, or in physical contact with a bottom surface of the nanowire core; a second dielectric material layer in physical contact with a top surface of the nanowire core; active layers grown only on sidewalls of the nanowire core and configured to emit visible light; and a second semiconductor layer grown on the active layers, where the nanowire core and the second semiconductor layer are oppositely doped.Type: ApplicationFiled: May 10, 2022Publication date: November 16, 2023Inventors: Wei Sin TAN, Andrea PINOS, Samir MEZOUARI
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Publication number: 20230352466Abstract: A light source includes a backplane including electrical circuits fabricated thereon, an array of micro-light emitting diodes (micro-LEDs) bonded to the backplane and configured to emit visible light, and an array of micro-lenses aligned with the array of micro-LEDs and configured to collimate the visible light emitted by the array of micro-LEDs. Each micro-lens of the array of micro-lenses has a plurality of discrete thickness levels. A pitch of the array of micro-lenses is equal to or less than about 5 ?m, such as about 2 ?m. The pitch of the array of micro-lenses can be the same as or different from the pitch of the array of micro-LEDs.Type: ApplicationFiled: April 28, 2022Publication date: November 2, 2023Inventors: Robert Leslie BREAKSPEAR, Samir MEZOUARI, Andrea PINOS, Wei Sin TAN
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Patent number: 11803125Abstract: There is provided a method of forming a patterned structure on a substrate. The method includes: forming a resist layer on the substrate, the resist layer being a negative tone resist; exposing a first portion of the resist layer to a focused electron beam to form a modified first portion, the modified first portion defining a boundary of a second portion of the resist layer; performing a plasma treatment on a surface of the resist layer, including on a surface of the second portion of the resist layer to form a modified surface portion of the second portion of the resist layer, resulting in a plasma treated resist layer; and performing development of the plasma treated resist layer to form the patterned structure on the substrate corresponding the second portion of the resist layer.Type: GrantFiled: July 2, 2020Date of Patent: October 31, 2023Assignee: Singapore University of Technology and DesignInventors: You Sin Tan, Joel Yang, Hailong Liu, Qifeng Ruan
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Publication number: 20230343811Abstract: A method of forming a dielectric collar for semiconductor wires includes providing a layers stack and a semiconductor wires (SW) layer on top of the stack, forming a base layer at a lower part of the SW and a capping layer at an upper part of the SW, the base layer parallel to the basal plane and including a dielectric material surrounding the lower part of the SW, and the capping layer along a contour of the SW and including a dielectric material surrounding the upper part of the SW, the base and capping layers having thicknesses e1 and e2 with e1>2.e2, performing anisotropic etching along the direction normal to the basal plane to remove the dielectric material at a top part of the SW and leaving the dielectric material at least in the lower part of the SW.Type: ApplicationFiled: October 1, 2020Publication date: October 26, 2023Inventors: Wei Sin TAN, Pamela RUEDA FONSECA, Pierre TCHOULFIAN
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Publication number: 20230333379Abstract: A light source includes an array of micro-light emitting diodes (micro-LEDs), an array of micro-lenses, and a bonding layer bonding the array of micro-lenses to the array of micro-LEDs. Each micro-LED of the array of micro-LEDs includes a first mesa structure formed in a plurality of semiconductor layers. The array of micro-lenses is bonded to a first semiconductor layer of the plurality of semiconductor layers by the bonding layer. The first semiconductor layer includes an array of second mesa structures formed therein. The first mesa structure and the second mesa structure are on opposite sides of the plurality of semiconductor layers. Each second mesa structure of the array of second mesa structures is aligned with a respective micro-lens of the array of micro-lenses and the first mesa structure of a respective micro-LED of the array of micro-LEDs.Type: ApplicationFiled: April 13, 2022Publication date: October 19, 2023Inventors: Samir MEZOUARI, Andrea PINOS, Wei Sin TAN, John Lyle WHITEMAN
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Publication number: 20230282680Abstract: A light source includes an array of micro-light emitting diodes (micro-LEDs) configured to emit light, a first semiconductor layer on the array of micro-LEDs and including porous structures formed therein to diffuse the light emitted by the array of micro-LEDs, and a second semiconductor layer on the first semiconductor layer. The second semiconductor layer includes a flat surface opposing the first semiconductor layer and is configured to couple the light diffused by the porous structures out of the light source through the flat surface.Type: ApplicationFiled: February 18, 2022Publication date: September 7, 2023Inventors: Andrea PINOS, Wei Sin TAN, Samir MEZOUARI, Jonathan David Neale SHIPP, Steven Ramos CARNEIRO, Keith Richard STRICKLAND
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Publication number: 20230282789Abstract: A light source comprises a backplane wafer with electrical circuits fabricated thereon, and an array of LEDs coupled to the backplane wafer. Each LED of the array of LEDs comprises a mesa structure including semiconductor epitaxial layers and characterized by inwardly tilted mesa sidewalls, a high-refractive index material region (e.g., with a refractive index greater than about 1.75, such as equal to or greater than a refractive index of the semiconductor epitaxial layers) surrounding the semiconductor epitaxial layers of the mesa structure and including outwardly tilted sidewalls, and a reflective layer on the outwardly tilted sidewalls of the high-refractive index material region. In one example, each LED of the array of LEDs also include a passivation layer on the inwardly tilted mesa sidewalls of the mesa structure.Type: ApplicationFiled: February 25, 2022Publication date: September 7, 2023Inventors: Wei Sin TAN, Andrea PINOS, Samir MEZOUARI, Kathleen Bonnie VINDEN, John Lyle WHITEMAN
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Publication number: 20230238421Abstract: A method of manufacturing a LED precursor and a LED precursor is provided. The LED precursor is manufactured by forming a monolithic growth stack having a growth surface and forming a monolithic LED stack on the growth surface. The monolithic growth stack comprises a first semiconducting layer comprising a Group III-nitride, a second semiconducting layer, and third semi-conducting layer. The second semiconducting layer comprises a first Group III-nitride including a donor dopant such that the second semiconducting layer has a donor density of at least 5×1018 cm-3. The second semiconducting layer has an areal porosity of at least 15% and a first in-plane lattice constant. The third semiconducting layer comprises a second Group III-nitride different to the first Group-III-nitride.Type: ApplicationFiled: March 25, 2021Publication date: July 27, 2023Applicant: PLESSEY SEMICONDUCTORS LIMITEDInventors: Andrea PINOS, Wei Sin TAN, Jun Youn KIM, Xiang YU, Simon ASHTON, Samir MEZOUARI
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Publication number: 20230207606Abstract: Disclosed herein are techniques for extracting and collimating light emitted by a light emitting diode (LED). According to certain embodiments, a device includes an LED configured to emit light in a first wavelength range, and an angle-dependent optical filter optically coupled to the LED. A transmission (or reflection) wavelength range of the angle-dependent optical filter varies with an angle of incidence (AOI) of the light incident on the angle-dependent optical filter, such that the angle-dependent optical filter transmits most of light emitted from the LED and having small AOIs, and reflects most of light emitted from the LED and having large AOIs, thereby reducing the divergence angle of the emitted light.Type: ApplicationFiled: December 29, 2021Publication date: June 29, 2023Inventors: Samir MEZOUARI, Andrea PINOS, Wei Sin TAN
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Patent number: 11688829Abstract: A light emitting diode (LED) device includes a substrate and a plurality of mesa structures. Each mesa structure includes a layer of a first semiconductor material, a porous layer of the first semiconductor material on the layer of the first semiconductor material, and a layer of a second semiconductor material on the porous layer. The porous layer is characterized by an areal porosity ?15%. The second semiconductor material is characterized by a lattice constant greater than a lattice constant of the first semiconductor material. Each mesa structure also includes an active region on the layer of the second semiconductor material and configured to emit red light, a p-contact layer on the active region, a dielectric layer on sidewalls of the p-contact layer and the active region, and an n-contact layer in physical contact with at least a portion of sidewalls of the layer of the second semiconductor material.Type: GrantFiled: December 30, 2020Date of Patent: June 27, 2023Assignee: META PLATFORMS TECHNOLOGIES, LLCInventors: Wei Sin Tan, Andrea Pinos, John Lyle Whiteman