Patents by Inventor Sin-Yi Jiang
Sin-Yi Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230343885Abstract: Image sensors and methods of forming the same are provided. An image sensor according to the present disclosure includes a silicon substrate, a germanium region disposed in the silicon substrate, a doped semiconductor isolation layer disposed between the silicon substrate and the germanium region, a heavily p-doped region disposed on the germanium region, a heavily n-doped region disposed on the silicon substrate, a first n-type well disposed immediately below the germanium region, a second n-type well disposed immediately below the heavily n-doped region, and a deep n-type well disposed below and in contact with the first n-type well and the second n-type well.Type: ApplicationFiled: June 8, 2022Publication date: October 26, 2023Inventors: Hsiang-Lin Chen, Sin-Yi Jiang, Sung-Wen Huang Chen, Yin-Kai Liao, Jung-I Lin, Yi-Shin Chu, Kuan-Chieh Huang
-
Publication number: 20230260815Abstract: The present disclosure provides a multi-substrate handling system having an alignment apparatus capable of positioning each of a set of substrates in predetermined orientations for transfer. A buffer chamber is configured to receive and condition the set of substrates which are disposed on a substrate carrier. A first transfer assembly is configured to transfer the set of substrates to and from the buffer chamber and is capable of transferring each of the set of substrates from the alignment apparatus to the carrier in the buffer chamber. The carrier includes a plurality of modules capable of securing the set of substrates. The system includes a second transfer assembly having at least two robots configured to transfer the carrier of the set of substrates between the buffer chamber and a process chamber. The process chamber is capable of processing the set of substrates using different process parameters for each substrate.Type: ApplicationFiled: June 16, 2021Publication date: August 17, 2023Inventors: Hsiu-jen WANG, Sin-Yi JIANG, Neng-rui DONG, Shih-Hao KUO, Chia-Hung KAO, Bang-Yu LIU, Hsu-Ming HSU
-
Patent number: 11600737Abstract: Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed in a silicon substrate, in some embodiments, or on a silicon substrate, in some embodiments. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer is on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair of doped regions in the germanium layer is configured as an e-lens of the germanium-based sensor.Type: GrantFiled: July 23, 2021Date of Patent: March 7, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jhy-Jyi Sze, Sin-Yi Jiang, Yi-Shin Chu, Yin-Kai Liao, Hsiang-Lin Chen, Kuan-Chieh Huang
-
Publication number: 20230069164Abstract: A semiconductor image sensor includes a first substrate including a first front side and a first back side, a second substrate including a second front side and a second back side, a third substrate including a third front side and a third back side, a first interconnect structure, and a second interconnect structure. The first substrate includes a layer and a first light-sensing element in the layer. The layer includes a first semiconductor material, and the first light-sensing element includes a second semiconductor material. The second substrate is bonded to the first substrate with the second front side facing the first back side. The third substrate is bonded to the first substrate with the third front side facing the first front side. The first interconnect structure and the second interconnect structure are disposed between the first front side and the third front side.Type: ApplicationFiled: August 30, 2021Publication date: March 2, 2023Inventors: JHY-JYI SZE, YI-SHIN CHU, YIN-KAI LIAO, HSIANG-LIN CHEN, SIN-YI JIANG, KUAN-CHIEH HUANG
-
Patent number: 11508817Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.Type: GrantFiled: September 29, 2020Date of Patent: November 22, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
-
Publication number: 20220367638Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.Type: ApplicationFiled: July 21, 2022Publication date: November 17, 2022Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
-
Publication number: 20220310871Abstract: A method of manufacturing a semiconductor structure includes: forming a light-absorption layer in a substrate; forming a first doped region of a first conductivity type and a second doped region of a second conductivity type in the light-absorption layer adjacent to the first doped region; depositing a first patterned mask layer over the light-absorption layer, wherein the first patterned mask layer includes an opening exposing the second doped region and covers the first doped region; forming a first silicide layer in the opening on the second doped region; depositing a barrier layer over the first doped region; and annealing the barrier layer to form a second silicide layer on the first doped region.Type: ApplicationFiled: March 26, 2021Publication date: September 29, 2022Inventors: YI-SHIN CHU, HSIANG-LIN CHEN, YIN-KAI LIAO, SIN-YI JIANG, KUAN-CHIEH HUANG
-
Publication number: 20220302336Abstract: Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed in a silicon substrate, in some embodiments, or on a silicon substrate, in some embodiments. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair doped region pair in the germanium layer is configured as an e-lens of the germanium-based sensor.Type: ApplicationFiled: July 23, 2021Publication date: September 22, 2022Inventors: Jhy-Jyi Sze, Sin-Yi Jiang, Yi-Shin Chu, Yin-Kai Liao, Hsiang-Lin Chen, Kuan-Chieh Huang
-
Publication number: 20220271080Abstract: The present disclosure provides a semiconductor structure, including a substrate including a first material, wherein the first material generates electrical signals from radiation within a first range of wavelengths, an image sensor element including a second material, wherein the second material generates electrical signals from radiation within a second range of wavelengths, the second range is different from first range, a transparent layer proximal to a light receiving surface of the image sensor element, wherein the transparent layer is transparent to radiation within the second range of wavelength, and an interconnect structure connected to a signal transmitting surface of the image sensor element.Type: ApplicationFiled: February 25, 2021Publication date: August 25, 2022Inventors: JHY-JYI SZE, SIN-YI JIANG, YI-SHIN CHU, YIN-KAI LIAO, HSIANG-LIN CHEN, KUAN-CHIEH HUANG, JUNG-I LIN
-
Publication number: 20220102410Abstract: Various embodiments of the present disclosure are directed towards an image sensor with a passivation layer for dark current reduction. A device layer overlies a substrate. Further, a cap layer overlies the device layer. The cap and device layers and the substrate are semiconductor materials, and the device layer has a smaller bandgap than the cap layer and the substrate. For example, the cap layer and the substrate may be silicon, whereas the device layer may be or comprise germanium. A photodetector is in the device and cap layers, and the passivation layer overlies the cap layer. The passivation layer comprises a high k dielectric material and induces formation of a dipole moment along a top surface of the cap layer.Type: ApplicationFiled: February 17, 2021Publication date: March 31, 2022Inventors: Hsiang-Lin Chen, Yi-Shin Chu, Yin-Kai Liao, Sin-Yi Jiang, Kuan-Chieh Huang, Jhy-Jyi Sze
-
Publication number: 20220037552Abstract: A method and structure providing an optical sensor having an optimized Ge—Si interface includes providing a substrate having a pixel region and a logic region. In some embodiments, the method further includes forming a trench within the pixel region. In various examples, and after forming the trench, the method further includes forming a doped semiconductor layer along sidewalls and along a bottom surface of the trench. In some embodiments, the method further includes forming a germanium layer within the trench and over the doped semiconductor layer. In some examples, and after forming the germanium layer, the method further includes forming an optical sensor within the germanium layer.Type: ApplicationFiled: June 2, 2021Publication date: February 3, 2022Inventors: Yin-Kai LIAO, Jen-Cheng LIU, Kuan-Chieh HUANG, Chih-Ming HUNG, Yi-Shin CHU, Hsiang-Lin CHEN, Sin-Yi JIANG
-
Publication number: 20210376086Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.Type: ApplicationFiled: September 29, 2020Publication date: December 2, 2021Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
-
Patent number: 10188579Abstract: A method for controlling a walking assistant apparatus includes: scanning a user so as to generate information associated with gait of the user; detecting a torque applied to a torque sensor; estimating a speed of the user based on the information; calculating a compliant motion speed, and a compliant rotational speed; and controlling the motion unit to move at the compliant motion speed and to turn at the compliant rotational speed. This disclosure provides an autonomous obstacle avoidance mechanism; by combining the obstacle avoidance mechanism and the compliance controls, the walking-assistance apparatus is able to help user prevent from collisions with obstacles when walking in an environment with obstacles.Type: GrantFiled: December 2, 2016Date of Patent: January 29, 2019Assignee: National Chiao Tung UniversityInventors: Kai-Tai Song, Shang-Yang Wu, Sin-Yi Jiang
-
Publication number: 20170189259Abstract: A method for controlling a walking assistant apparatus includes: scanning a user so as to generate information associated with gait of the user; detecting a torque applied to a torque sensor; estimating a speed of the user based on the information; calculating a compliant motion speed, and a compliant rotational speed; and controlling the motion unit to move at the compliant motion speed and to turn at the compliant rotational speed. This disclosure provides an autonomous obstacle avoidance mechanism; by combining the obstacle avoidance mechanism and the compliance controls, the walking-assistance apparatus is able to help user prevent from collisions with obstacles when walking in an environment with obstacles.Type: ApplicationFiled: December 2, 2016Publication date: July 6, 2017Inventors: Kai-Tai SONG, Shang-Yang WU, Sin-Yi JIANG
-
Patent number: 8380379Abstract: The present invention discloses a walking assistive system comprising a motion module, a current detecting module and a central control module. Each motion module includes omni-directional wheels, motors, shaft encoders and servo controllers. The omni-directional wheels are connected to and driven by the motors. The motors are connected to the shaft encoders, and the rotation speed values are generated corresponds to the rotation speed of the motors by the shaft coder. The servo controllers connected to the shaft encoders and the motors receive the rotation speed values and control the motors. The current detecting modules connected to the motors detect the current of the motors and generate current values correspondingly. The central control module connected to the motion control module and the current detecting module controls the platform compliant motion control modules according to the rotation speed values and the current values.Type: GrantFiled: October 12, 2010Date of Patent: February 19, 2013Assignee: National Chiao Tung UniversityInventors: Kai-Tai Song, Sin-Yi Jiang, Ko-Tung Huang
-
Publication number: 20110282529Abstract: The present invention discloses a walking assistive system comprising a motion module, a current detecting module and a central control module. Each motion module includes omni-directional wheels, motors, shaft encoders and servo controllers. The omni-directional wheels are connected to and driven by the motors. The motors are connected to the shaft encoders, and the rotation speed values are generated corresponds to the rotation speed of the motors by the shaft coder. The servo controllers connected to the shaft encoders and the motors receive the rotation speed values and control the motors. The current detecting modules connected to the motors detect the current of the motors and generate current values correspondingly. The central control module connected to the motion control module and the current detecting module controls the platform compliant motion control modules according to the rotation speed values and the current values.Type: ApplicationFiled: October 12, 2010Publication date: November 17, 2011Applicant: NATIONAL CHIAO TUNG UNIVERSITYInventors: KAI-TAI SONG, SIN-YI JIANG, KO-TUNG HUANG